Technical Note

How Do I Slow the Rise Time of My Voltage Pulser?

PVX and PVM series pulsers are built for speed, and the rise/fall time is fixed by the output stage rather than user-adjustable. Some applications call for a slower, more controlled edge instead. Here is how to shape it deliberately, why series resistance is the preferred method, and how to size and select the resistor.

DEI Pulsers (Directed Energy Division) · Rise-time shaping for capacitive loads
Berkeley Nucleonics DEI high-voltage pulse generator

1Why Slow the Edge Down

PVX and PVM series high voltage pulsers are built to drive capacitive loads as fast as the output stage allows, and that rise/fall time is not user-adjustable. Most applications want every nanosecond of that speed. Some do not. A device under test with its own bandwidth limit, a cable or fixture prone to ringing on a fast edge, or a load that only tolerates a gentler slew rate can all call for a deliberately slower edge than the pulser produces on its own.

The pulser cannot be reconfigured to output a slower native edge. Instead, the edge is shaped externally, between the pulser output and the load. Two approaches are commonly proposed: add capacitance at the load, or add resistance in series with it. The sections below cover why the added-capacitance approach is limited by the pulser's power-dissipation rating, and why a series resistor is the more practical and more commonly used method.

2The Power-Dissipation Ceiling

Driving any capacitive load dissipates power according to P = C · V² · F, where C is the total load capacitance (the load itself, its cable, and the pulser's own internal capacitance), V is the pulse voltage, and F is the repetition frequency. Every PVX and PVM model has a maximum average power dissipation rating, and this relation sets the achievable combination of capacitance, voltage, and repetition rate before that ceiling is reached.

Consider the PVX-4110, rated for a maximum average power dissipation of 100 W and an internal capacitance of approximately 50 pF. At its rated maximum of 10,000 V and 10 kHz, the load capacitance budget works out to roughly 100 pF total, consistent with the 50 pF internal capacitance plus a modest external load and cable. Adding capacitance at the load to slow the edge eats directly into that budget: more capacitance at the same voltage and repetition rate means more dissipated power, and the maximum voltage or repetition rate has to come down to compensate.

Model-specific. Maximum dissipation, internal capacitance, and maximum voltage/PRF vary by model. Confirm the exact figures on the datasheet for the specific PVX or PVM model in use before sizing added capacitance.

3Added Capacitance vs. Series Resistance

Because added output capacitance is constrained by the power budget above, and because it changes the load the pulser sees (with knock-on effects on peak current and heating), it is a limited and generally less desirable way to slow the edge. Inserting a series resistor between the pulser output and the load is the preferred method. The resistor forms an RC time constant with the load capacitance, and that RC product becomes the dominant factor setting the rise time, not the pulser's internal power budget.

A series resistor has two further advantages: it does not add heating inside the pulser the way extra load capacitance does, and it is straightforward to change or remove without touching the pulser itself.

4The Series-RC Method

With a resistor R in series with a total load capacitance C, the output edge is rounded into an exponential, and the standard ten-to-ninety-percent rise time follows the familiar relation t_rise ≈ 2.2 · R · C. This is the same RC relation that governs cabling effects on any fast pulser output; here it is applied deliberately instead of treated as a parasitic. Solving for the resistor needed to hit a target rise time is a matter of rearranging: R = t_rise / (2.2 · C).

C in this relation is the total load capacitance: the device under test, plus the connecting cable, plus the pulser's own internal capacitance from Section 2. Coaxial cable typically contributes on the order of 20 pF per foot, depending on cable type and dielectric. Confirm the figure for the specific cable in use rather than assuming a round number, since it can move the result meaningfully on short RC time constants.

5Worked Example

The numbers below are an illustrative example using the PVX-4110's own published 150 pF reference load. They are not a universal recommendation; recompute for the actual load, cable, and target rise time in hand.

Target. Suppose the application calls for roughly a 500 ns rise time (well beyond the PVX-4110's native under-60 ns edge) into a total load capacitance of 150 pF.

Solve for R. R = t_rise / (2.2 · C) = 500 ns / (2.2 · 150 pF) ≈ 1.5 kΩ.

Check. Plugging 1.5 kΩ back in: 2.2 · 1500 Ω · 150 pF ≈ 495 ns, within rounding of the 500 ns target.

Illustrative only. This example uses a reference load capacitance published on the PVX-4110 datasheet. Actual rise time depends on the real load, cable length and type, and the resistor's own parasitics (Section 7). Verify the result on the bench with the actual load in place.

6Resistor Voltage Rating

The series resistor sits directly between the pulser's high voltage output and the load, so it must be rated for the full pulse voltage, not just the voltage drop across it in normal operation. Standard commercial resistors are typically rated for only 100–350 V. If the load ever arcs, flashes over, or otherwise fails as a short circuit, the full pulse voltage from the generator appears across the series resistor almost instantaneously. A resistor rated only for a fraction of that voltage can fail catastrophically under that condition.

Select a resistor (or resistor combination, see Section 8) explicitly rated for the full output voltage of the pulser in use, not merely the voltage the resistor sees in normal, non-fault operation.

7Avoiding Parasitic Inductance

Ordinary wirewound resistors have significant parasitic inductance from their coiled construction. Inserted into a fast-edge high voltage path, that inductance interacts with the edge to produce voltage spikes, following V = L · di/dt: the faster the current changes, the larger the spike for a given inductance. At high voltage, an inductance-driven spike can be large enough to damage the resistor, the load, or the pulser output stage.

Use resistors specifically constructed to minimize inductance for this application, such as non-inductive wirewound types or thin-film resistors designed for pulse and high voltage service, rather than a generic wirewound part pulled from a general-purpose bin.

8Stacking Resistors for Higher Voltage

When a single resistor rated for the full pulse voltage is not readily available in the needed resistance value, multiple lower-voltage-rated resistors can be connected in series. Voltage rating adds directly with series resistors: ten resistors each rated for 50 V in series yield a string rated for 500 V, at ten times the resistance of a single unit. Size the individual resistor values so the series total lands at the target R from Section 5.

When stacking resistors for high voltage, maintain adequate physical spacing and creepage distance between them, and follow standard high-voltage layout practice, to prevent arcing across or between the individual resistors.

Example manufacturers — verify before specifying. Caddock Electronics, Ohmite, Vishay, and Ohmcraft (Exxelia) all publish non-inductive, high-voltage-rated resistor product lines commonly used in pulser applications like this one. This is a starting point for sourcing, not an approved-vendor list or an endorsement; confirm current part availability, ratings, and any BNC-approved-supplier requirements with engineering before specifying a part.

9Relationship Summary

The table collects the relations from this page in one place.

QuantityRelationNote
Power dissipationP = C V² FLimits added output capacitance; confirm the rating for the specific model.
RC rise time (10–90%)t_rise ≈ 2.2 R CC is the total load: device, cable, and pulser internal capacitance.
Resistor valueR = t_rise / (2.2 C)Solve for the series resistor needed to hit a target rise time.
Inductive spikeV = L di/dtWhy ordinary wirewound resistors are unsuitable; use non-inductive types.
Read as first-order. These are standard first-order relations; exact behavior depends on the specific pulser, cable, load, and resistor parasitics. See Capacitive-Load Pulsing for the underlying physics of I = C dV/dt and the power budget, and Selecting an HV Pulse Generator for model selection.

10Talk to an Engineer

Sizing a series resistor for a real application means working from the actual load capacitance, cable length, target rise time, and pulse voltage together, and confirming the pulser's power-dissipation rating is not exceeded. A BNC applications engineer can help work through that against the specific PVX or PVM model in use.

Contact a BNC applications engineer at info@berkeleynucleonics.com or 800-234-7858.