Selecting a High-Voltage Pulse Generator

A resistive load draws current in proportion to voltage, steady for the duration of the flat top, set directly by Ohm's law. A capacitive load draws current only while the voltage is changing, and that current is set by how fast you change it: I = C times dV/dt. The faster the edge and the larger the capacitance, the more peak current the output stage must deliver, even though the steady-state current at the flat top is near zero.

This is why capacitance, not voltage alone, sets the current demand for fast pulsing. A Pockels cell, a deflection plate, an extraction grid, or a length of coaxial cable all present capacitance. Drive a 100 pF load to 5 kV in 25 ns and the edge demands about 20 A of peak current (100 pF × 5,000 V / 25 ns), all of it to charge and discharge the capacitor.

For a deeper treatment of charging a reactive load and keeping a fast edge clean into capacitance, see the companion note on pulsing capacitive loads. With the load capacitance known, each specification that follows can be checked against a number.

That architecture is what gives a pulser its flexibility. Set VLow to ground and VHigh positive and you get a conventional unipolar positive pulse. Set VHigh positive and VLow negative and the output swings through zero into both polarities, a true bipolar swing. Many applications need it: bias networks driven above and below a reference, electro-optic cells that respond to field direction, and grids that require an active reset to a negative level rather than a passive decay.

When you read a model's voltage line, note whether it is a single magnitude, a plus-or-minus range, or a pair of supply inputs, because each places different limits on the levels. On the PVX-4110, PVX-4130, PVX-4141 and PVX-4151, VHigh and VLow are user-supplied DC inputs: each can sit anywhere within the model's rating (±10,000 V on the PVX-4110), provided VHigh is above VLow by no more than that rating. The PVX-4000-2kV sets its positive and negative levels from internal supplies, through the front panel or the computer interface, within a shared budget: V+ plus |V−| may not exceed 2,000 V. The PVM-1001 switches a single external high-voltage input and comes as separate positive (PVM-1001-P, 0 to +950 V) and negative (PVM-1001-N, 0 to −950 V) models. The PVM-4210 has one positive and one negative channel, each set from 0 to 950 V.

Read the edge specification against your timing budget. If the experiment needs a 100 ns gate with 10 ns of margin at each end, an edge well under 10 ns leaves room; an edge of 60 ns does not. Where the amplitude is low and the transition must be as fast as possible, the 765-HV pulse generator delivers rise and fall times under 630 ps (10 to 90 percent) at up to 50 Vpp into 50 ohm. The PVM-1001 reaches 8 ns or less (PVM-1001-P, 200 V to 950 V) into a 50 ohm resistive load, with a slower fall of up to 50 ns at 450 V to 950 V. Into capacitive loads, the fastest edges in Section 10 are on the PVX-4141 and PVX-4151, at 25 ns or less into 50 pF. A slower edge is sometimes preferable: it lowers peak current, reduces ringing into a reactive load, and eases the average-power burden at high repetition rates.

Check three things. First, that the pulser can produce the minimum width you need without the edges merging, which sets a floor near the sum of the rise and fall times. Second, that it supports the maximum width or duty cycle you require: the PVX models and the PVM-4210 run from their minimum width to DC, while the PVM-1001 is limited to 10 µs and the PVX-2506 to 100 µs at up to 50 percent duty. Third, that width and repetition rate together stay inside the duty-cycle and average-power limits below. Pulse width, duty cycle, and average power are one connected budget.

The same edges that carry the pulse can also carry overshoot, a brief excursion past the target level at the top of the rising edge, followed by ringing as the output settles. It is the interaction of the fast edge with the inductance and capacitance of the output and load. A clean flat-top specification accounts for all of it: the settling after overshoot, the droop across the hold, and the return to baseline. When flat-top accuracy drives your result, weigh droop and overshoot as heavily as the headline edge speed.

For a single isolated pulse it rarely matters. For a system where many channels must land inside a tight window, or where many shots are averaged and must stack cleanly, low jitter is essential. Read the jitter figure against the timing window your experiment can tolerate, the same way you read edge speed against the gate width. A pulser with a fast edge but loose jitter can still miss a narrow coincidence window.

Among the models in Section 10, the PVX-4141 specifies jitter under 200 ps shot to shot; the PVX-4110, PVX-4130, PVX-4151 and PVM-4210 specify under 1 ns. Throughput delay, the fixed latency from gate to output, is a separate number (120 ns typical on the PVX-4141, 93 ns typical on the PVM-4210) and can be calibrated out; jitter cannot.

This is why a model's voltage rating and its maximum repetition rate are quoted together, and why the highest-voltage parts carry the lowest repetition-rate ceilings. Energy per pulse rises with the square of voltage and with load capacitance, so a 10 kV unit reaches its thermal limit at a rate about 44 times lower than a 1,500 V unit into the same load ((10,000 / 1,500)² ≈ 44). When you size a pulser for repetitive work, multiply through (energy per cycle times rate) and check the product against the maximum average power: 100 W on the PVX-4110, PVX-4130 and PVX-4141, 150 W on the PVX-4151, and 4 W per channel on the PVM-4210. The capacitive-load note covers this energy budget in more detail.

The V monitor shows the flat-top level, droop, and overshoot without perturbing the output. The I monitor shows the peak charging current into a capacitive load, the quickest way to confirm that your edge speed and load capacitance are within the reach of the output stage. The PVX-4110 and PVX-4130 monitors scale 2000:1 (voltage, into 1 MΩ) and 10 A/V (current, into 50 Ω); the PVX-4141 and PVX-4151 scale 1000:1 and 10 A/V. The PVX-4000-2kV has a voltage monitor (1,000 V per 10 V) and a sync output and no current monitor, and the PVM-4210 and PVM-1001 modules have no monitor outputs.

In single-shot or low-rate work, peak performance dominates: you can use the full voltage and the fastest edge because there is time to cool between events. The PVX-2506, for instance, drives pulsed current-voltage tests where each measurement is a short burst with ample settling time. In high-rate work, average power dominates, as Section 7 described, and usable voltage or edge speed may have to back off to stay inside the thermal envelope. Some units add a burst mode that allows a short run above the continuous ceiling, useful when the experiment needs a brief fast train rather than indefinite operation. Decide which mode your application lives in before you compare numbers, because the same pulser can look very different in each.

For a quick question, an engineer can usually tell you in minutes whether a model fits or whether a different one in the line is the better match.

For help choosing, contact a BNC applications engineer at info@berkeleynucleonics.com or 800-234-7858.