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Berkeley Nucleonics Corporation
Precision timing reference handbookBNC-HB-003 Rev DOctober 2026 | dc-62022201
An optical table in a pulsed laser laboratory: mirror and lens mounts along a beam path, with coaxial cable waiting to carry the timing. No real site or instrument is depicted.
IllustrationAn optical table in a pulsed laser laboratory: mirror and lens mounts along a beam path, with coaxial cable waiting to carry the timing. No real site or instrument is depicted.
Handbook

Digital Delay Generators in the pulsed laboratory

How a counted clock turns one trigger into an experiment, what jitter, insertion delay and edge rate cost at the bench, and the working reference for the Model 577, 588B, 745T, 765 and 765‑HV.

Timing physicsJitter and its references, insertion delay, accuracy, the fast edge
Five instruments577, 588B, 745T, 765 and 765-HV, every value with its condition
Ten benchesLasers, PIV, gated cameras, radar, lidar, wafers, detectors, streak cameras
ReferenceTroubleshooting, cables, logic levels, oscilloscopes, quick reference

Digital Delay Generators in the pulsed laboratory

How a counted clock turns one trigger into an experiment, what jitter, insertion delay and edge rate cost at the bench, and the working reference for the Model 577, 588B, 745T, 765 and 765‑HV.

Abstract

Every pulsed experiment is a scheduling problem: a handful of instruments must act in a fixed order, at fixed intervals, shot after shot. This handbook is about the instruments that own that schedule. Part I builds the timing physics: jitter and its references, insertion delay, the counted-clock architecture, the accuracy arithmetic and the physics of a fast edge. Part II reviews five Berkeley Nucleonics instruments against the requirements that physics derives: the Model 577 and Model 588B counted-clock Digital Delay Generators, the Model 745T with its 1 ps placement, the Model 765 with its 70 ps edge and the Model 765-HV, which swings 50 V into 50 Ω with a 400 ps edge, both 20 to 80 percent. Part III wires ten benches, from Q-switched lasers to streak cameras, with worked numbers and channel maps. Part IV is the troubleshooting table, the bench references and the quick reference.

Who this paper is for

Written for the design and test engineer: radar, lidar and semiconductor test engineers who need a fast, high-amplitude pulse with its published conditions, and integration engineers and experimental physicists building repeatable multi-channel timing. The second audience is the field engineer and technician wiring a laser, camera or detector bench, who will use Parts III and IV most.

David Brown, President, Berkeley Nucleonics Corp.

Key results
50 ps RMS
Channel-to-channel jitter of the Model 577 and 588B; every interval built inside one instrument inherits it.
2.89 ns
RMS error of a bare trigger synchronizer at 100 MHz, T/√12; the published 800 ps trigger jitter is below it.
75 V/ns
Slew rate of the Model 765-HV: 50 Vpp into 50 Ω with a 400 ps edge, 20 to 80 percent.
0.9 ps
Trigger jitter that would degrade a 2 ps streak camera by ten percent; no instrument here meets it.
Contents
  1. 1How to use this handbook
  2. Part I. Time on the bench
  3. 2Why experiments run on delayed edges
  4. 3Jitter, and the reference that gives it meaning
  5. 4The counted clock, and why channels agree with each other
  6. 5Insertion delay, the latency floor
  7. 6Accuracy, which is not jitter
  8. 7The edge: amplitude, time, and the current between them
  9. 8Derived requirements
  10. Part II. The instruments, reviewed
  11. 9The family: five instruments, three kinds of picosecond
  12. 10The timing engine, against R1 to R5
  13. 11Outputs, and the arithmetic of a 50 ohm world
  14. 12Routing, gating and modes: R7 at work
  15. 13Clocks in, clocks out, and staying coherent
  16. 14Remote operation
  17. 15The Model 745T: placement at one picosecond
  18. 16The Model 765: the 70 picosecond edge
  19. 17The Model 765-HV: fifty volts in four hundred picoseconds
  20. 18Where these instruments are not the answer
  21. Part III. The benches, wired
  22. 19The Q-switched laser, and the delay that is an energy knob
  23. 20Particle image velocimetry: two pulses, one number
  24. 21Pump-probe: the delay axis is the data axis
  25. 22Gated cameras: ICCD timing and the LIBS window
  26. 23Coincidence counting: the window arithmetic
  27. 24Ground-penetrating and ultra-wideband radar: the pulse is the resolution
  28. 25Lidar and the laser-diode driver: the pulse that leaves the box as light
  29. 26Semiconductor characterization: short pulses, slow pulses, and stress
  30. 27Detector front ends: emulating the particle before the beam exists
  31. 28Streak cameras, and the limit of the trigger
  32. Part IV. Practice and reference
  33. 29Measurement practice
  34. 30Troubleshooting
  35. 31Bench reference tables
  36. 32Quick reference
  37. 33Definitions, symbols and further reading

1How to use this handbook

This is a reference document, arranged in four parts that can be entered separately. Part I is the physics; section 7 names the instruments only to size its examples. Part II is the instrument review, with every published value quoted with its condition. Part III is ten applications at wiring level. Part IV is the bench material: practice, troubleshooting, reference tables, and the quick reference.

Table 1 is the router. Find the row that matches why you opened this document and start where it points.

Table 1. A router, not a summary. Each row names the shortest path through the handbook for one kind of question. Section 32 collects every governing relation and published value in one place with its condition attached, for the second and later visits, which are usually for a number.
If you areStart atAnd you can skip
Learning what jitter and insertion delay arePart I, sections 2 and 3 to 6Parts II and III
Specifying a delay generator for an experimentSection 8, then Part II, then section 32Part III until wiring day
Choosing between five instruments that all say "delay" on the panelSection 9, then the review chapter the table points toThe physics of Part I, until a number needs its derivation
Needing a fast edge, a high-voltage pulse, or picosecond placementSection 7, then sections 16, 17 or 15The counted-clock chapters, sections 10 to 14
Wiring a laser, camera or detector bench this weekThe matching recipe in Part III, then section 30Part I on the first pass
Chasing a timing fault that appeared from nowhereSection 30, then section 31Everything that is not the fault
Looking for a number you already understandSections 31 and 32Everything else

Conventions used throughout

Part ITime on the benchWhat a delay generator is for, what jitter and insertion delay are, how a counted clock makes a delay, the accuracy arithmetic, and the physics of a fast edge. The instruments appear only where a worked number needs one.

2Why experiments run on delayed edges

A pulsed measurement is a set of instruments that must act in one fixed order at fixed intervals: pump a laser, open its cavity, gate a camera, arm a digitizer, read out. None of those devices knows about the others. Each exposes one input, a trigger edge, and does its one thing some time after that edge arrives. The whole experiment therefore reduces to a scheduling problem: produce N electrical edges with defined separations, once per shot, forever.

The improvised answer grows one box at a time. A function generator supplies the repetition rate. A coil of coax delays one line by its length. A one-shot circuit stretches a pulse for a gate. Each addition works, and the sum does not: every analog delay drifts with temperature, every added box has its own threshold and its own latency, and by the fifth device nobody can say where time zero is anymore. The limit is not any single instrument. It is the accumulation of small, separately reasonable timing decisions into a bench whose timing cannot be reproduced.

A Digital Delay Generator collapses that accumulation into one instrument: one timebase, one trigger, and many output channels, each programmed with a delay and a width. Every edge the experiment needs comes from the same counted clock, so every interval is a number in a register rather than a length of cable. The three questions that decide whether such an instrument can carry a given experiment are the subjects of the next three sections: how repeatable are its edges (jitter), how soon after a trigger can it act (insertion delay), and how true are its programmed intervals (accuracy).

020406080100Triggerexternal or internal T0edgeChannel Adelay 20, width 18widthdelay endsChannel Bdelay 55, width 30widthTime (arbitrary units)Each channel is two numbers: a delay from the trigger to its rising edge, and a width to its falling edge.
SchematicFigure 1. The whole programming model in one picture. A trigger edge starts every channel's delay counter at once; each output goes high when its own delay elapses and low after its own width. Every interval in the experiment is the difference of two programmed numbers, which is what makes the schedule reproducible: registers do not drift the way cable coils and one-shots do.

Figure 1 is the reference for everything that follows. Every specification in this handbook attaches to one of its elements: jitter to the repeatability of the edges, insertion delay to the gap between the trigger and the earliest possible output, accuracy to the truth of the programmed numbers.

3Jitter, and the reference that gives it meaning

Jitter is the shot-to-shot wander of an edge about its ideal position. It is quoted as an RMS value, the standard deviation of the edge-time distribution, and the first thing to understand is that no instrument has one jitter. It has one jitter per pair of points you compare. The two that matter for a delay generator are trigger-to-output jitter, an external trigger edge against a delayed output edge, and channel-to-channel jitter, one output of the instrument against another on the same shot. Section 4 shows why those two differ by an order of magnitude on a counted-clock instrument, and that one difference sets the design rule the recipes of Part III lean on.

RMS against peak-to-peak

Random jitter is Gaussian and therefore unbounded: watch long enough and some edge lands arbitrarily far out. A peak-to-peak jitter figure with no population size and no probability attached is therefore meaningless. The honest conversion is a crest factor:

tpk-pk = k × tRMS
(1)

where

k
a crest factor chosen for a target exceedance probability: 6 covers about 99.7 percent of edges, 6.6 covers 99.9 percent, and serial-data work uses 14.1 for one edge in 1012 outside the window
tRMS
the RMS jitter, the number datasheets publish

Worked once so the habit forms: an output with 50 ps RMS jitter has a 6-sigma peak-to-peak of 6 × 50 = 300 ps, and a 10−12-grade peak-to-peak of 14.1 × 50 = 705 ps. Same instrument, same physics, both numbers correct, differing only by the convention in equation (1). Quote the convention or quote nothing. Deterministic jitter, the bounded kind that comes from supply ripple, crosstalk and the quantization of section 4, adds on top linearly rather than in quadrature, because it is not Gaussian.

Where jitter comes from: the threshold crossing

Every trigger input is a comparator, and a comparator converts voltage noise into timing noise at a rate set by how fast the signal crosses the threshold:

tj = vn / (dV/dt)
(2)

where

vn
the RMS voltage noise at the comparator input, typically a millivolt or so at a bench input
dV/dt
the slew rate of the signal through the threshold

Worked at both extremes. A clean 2 V edge that rises in 4 ns slews at 0.5 V/ns; with 1 mV of input noise, equation (2) gives 1 mV / (0.5 V/ns) = 2 ps of jitter. The same 2 V arriving over 100 ns slews at 0.02 V/ns and the same millivolt becomes 50 ps. A 25 times slower edge costs 25 times the jitter, from nothing but the geometry of the crossing. Drive every trigger input with the fastest clean edge available: that is a physics statement, not a preference.

Jitter is a property of a path

Jitter is not a property of the instrument alone. It is a property of a path: source slew rate, cable, comparator, clock domain and output driver together. The same delay generator shows an order of magnitude between its best-referenced and worst-referenced numbers, and a slow trigger edge can dominate everything the datasheet says. When a jitter measurement disappoints, suspect the path before the box.

4The counted clock, and why channels agree with each other

Nearly every Digital Delay Generator is built the same way, and knowing the architecture is what lets a reader predict its behavior instead of memorizing it. A crystal oscillator, stable but slow, is multiplied by a phase-locked loop up to a counting frequency of order 100 MHz. Each channel is a counter that counts N whole periods of that clock, followed by an analog vernier that adds the fraction of a period the counter cannot represent:

delay = N × Tclk + tvernier
(3)

where

N
the whole number of clock periods counted
Tclk
the clock period, 10 ns at 100 MHz, 5 ns at 200 MHz
tvernier
an analog fine delay, between zero and one clock period, which is where sub-period resolution comes from

The counter gives range bounded only by its width, in practice a thousand seconds and more, at crystal stability; the vernier gives resolution far below one clock period. The split explains the specification sheet: range comes from counter width, resolution from the vernier, long-delay accuracy from the crystal, and fine-scale accuracy from vernier linearity.

Crystaloscillatorstable, tens ofMHz, sets accuracyin ppmPLLmultiplierclock at 100 to200 MHzTriggersynchronizerresamples anexternal edge intothe clock domainChannelcountersN whole clockperiods eachVerniersub-period finedelayOutputdriversone per channel,MUX ahead of themExternaltriggercomparator inputEverything after the synchronizer runs on one shared clock, which is why channels agree with each other better than with the outside world.
SchematicFigure 2. The canonical delay generator. An external trigger must pass through the synchronizer to enter the clock domain, and that crossing carries a cost every datasheet reflects: the trigger-referenced jitter figure of a counted-clock instrument is far larger than its channel-to-channel figure, because only the trigger path pays the resampling toll. Internally triggered operation starts inside the clock domain and never pays it.

The synchronizer, quantified

An external trigger is asynchronous: it arrives anywhere within a clock period with uniform probability, and the synchronizer of Figure 2 aligns it to the next clock edge. The timing error of that alignment is uniformly distributed across one period, and the RMS of a uniform distribution of width T is T/√12:

tRMS,sync = Tclk / √12
(4)

where

Tclk
the counting clock period
√12
3.464, the ratio between the width and the RMS of a uniform distribution

Worked at the two clock rates in this handbook. At 100 MHz the period is 10 ns and equation (4) gives 10 / 3.464 = 2.89 ns RMS. At 200 MHz, 5 ns and 1.44 ns RMS. A bare synchronizer, nothing else wrong, contributes nanoseconds. When an instrument publishes an external-trigger jitter below its own Tclk/√12, as the Model 577 and Model 588B of Part II do at 800 ps against bounds of 2.89 and 1.44 ns, it is telling you the trigger path measures the arrival phase within the clock period rather than merely resampling, and the published number is the residual of that finer mechanism.

Why channel-to-channel wins

Here is the fact that decides experiment architecture. Whatever error the synchronizer makes on a given shot, it makes once, before the counters start, so it moves every channel of that shot together. In the interval between channel A and channel B the synchronizer term is common mode and cancels exactly. What remains is only the differential part: vernier noise, driver threshold noise, clock distribution skew noise, tens of picoseconds. The trigger-referenced number carries the whole synchronizer residual; the channel-to-channel number carries none of it.

The design rule this buys

Put every interval that matters between two channels of one instrument, and let the external trigger position only the whole shot. An interval built as channel minus channel inherits the tens-of-picoseconds figure; the same interval built across two separately triggered devices inherits the trigger figure at both ends. The recipes of Part III lean on this rule throughout, and section 20 works the case where it is worth a factor of sixteen.

From phase noise to jitter, when the timebase is the question

For completeness, the conversion between the frequency-domain and time-domain descriptions of a timebase, needed whenever an oscillator datasheet quotes phase noise and the experiment budget needs seconds:

tRMS = √(2 ∫L(f) df) / (2πf0)
(5)

where

L(f)
the single-sideband phase noise as a linear power ratio per hertz, integrated over the stated offset band
f0
the carrier frequency of the clock

Worked once, digit by digit, at a 100 MHz clock with phase noise flat at −120 dBc/Hz from 1 kHz to 1 MHz offset. The linear ratio is 10−12 per hertz; the band is 999,000 Hz wide; the integral is 9.99 × 10−7; doubled for both sidebands, 2.0 × 10−6; the square root is 1.41 × 10−3 radians; divided by 2π × 108 radians per second, the result is 2.25 ps RMS. The integration limits are part of the answer, and equation (5) without its limits is not a number.

5Insertion delay, the latency floor

Insertion delay is the time from an external trigger edge at the connector to the earliest possible output transition with the programmed delay at zero. It is the instrument's built-in latency: the comparator that turns an analog edge into a decision, the synchronizer of section 4, the counter start logic, and the output driver, summed. No programmed setting can produce an output earlier than the trigger plus this floor, and for the instruments in Part II the floor is between about 65 and 160 nanoseconds.

Internally triggered operation has no insertion delay, and it is worth being precise about why. When the instrument free-runs on its internal rate generator, time zero is created inside the clock domain: there is no comparator and no synchronizer in the path, so there is nothing to insert. The question the floor answers, how soon after an outside event can this instrument act, does not arise when the instrument itself is the source of the event.

A bound with its cause

A gate cannot open sooner after an outside flash than the insertion delay allows: about 110 ns on the Model 577, because a comparator, a synchronizer and a driver stand in the path. If the experiment needs a gate within nanoseconds of an event, the event must come from the generator, not the generator from the event. That single sentence decides the architecture of section 22.

6Accuracy, which is not jitter

Jitter is shot-to-shot scatter; accuracy is where the mean lands. The two are set by different hardware, the vernier and driver for jitter, the crystal for accuracy, and an experiment can need either, both, or neither. The published form of delay accuracy for the instruments in this handbook is a fixed term plus a proportional term:

error ≤ 1 ns + 10−4 × delay
(6)

where

1 ns
the fixed part: calibration residual and vernier zero error
10−4 × delay
the timebase part, 100 ppm of the programmed delay, which dominates beyond 10 µs

Equation (6) rewards being evaluated at three settings, because its two terms change places. At 1 µs the bound is 1 ns + 0.1 ns, dominated by the fixed term. At 180 µs, a laser timing value section 19 uses, it is 1 ns + 18 ns = 19 ns. At 1 s it is 100 µs, one hundred thousand times the fixed term. Same instrument, same specification line, five orders of magnitude between the absolute errors, purely because the delay grew. Any experiment quoting an accuracy figure without the delay it assumes is quoting nothing.

The repair for the proportional term is a better ruler. Locking the instrument's PLL to an external reference replaces the internal crystal's error with the reference's, and two distinct benefits follow. Absolute accuracy inherits the reference: a GPS-disciplined standard at one part in 1011 shrinks that 100 µs proportional error at one second to 10 ps, leaving the 1 ns fixed term as what remains of the bound. And mutual coherence, usually worth more: every instrument locked to one reference shares the same frequency error, so inter-instrument drift cancels as common mode even when the reference itself is mediocre. Two free-running instruments at 100 ppm each can disagree by 200 ppm of any interval; locked to one house clock they track together. Section 13 covers what the instruments accept.

7The edge: amplitude, time, and the current between them

An edge placed to the picosecond can still arrive too slowly, too small, or carrying more current than the load can take. For radar and lidar transmitters, laser-diode drivers, semiconductor stress tests and detector front-end emulation, the shape of the edge is the measurement. Three quantities describe it, and Ohm's law and a capacitor tie them together.

Rise time, and the thresholds that define it

A rise time is the interval between two threshold crossings on the same edge, and the thresholds are part of the specification. The 10-to-90 percent convention includes the foot and the shoulder of the edge, which are its slowest parts; the 20-to-80 percent convention excludes them. For an edge with a roughly Gaussian profile the ratio between the two is fixed, 2.563 to 1.683 standard deviations, so a 10-to-90 figure is about 1.5 times the 20-to-80 figure of the same edge. The fast instruments of Part II publish both: the Model 765 at 70 and 105 ps, the Model 765-HV at 400 and 630 ps, ratios of 1.50 and 1.58, bracketing the Gaussian 1.52. Quote the thresholds with every rise time.

Slew rate, and what it asks of the load

dV/dt = 0.6 A / t20-80
(7)

where

A
the pulse amplitude into the stated load
t20-80
the rise time between 20 and 80 percent, the interval over which 0.6 A of swing happens

Worked across this handbook's outputs. A TTL module publishing 0.5 V/ns is the floor. The Model 765 at 5 V in 70 ps slews, by equation (7), at 0.6 × 5 / 0.07 = 43 V/ns. The Model 765-HV at 50 V in 400 ps slews at 0.6 × 50 / 0.4 = 75 V/ns, the highest slew rate of any output in this handbook, and about five times what the Model 577's 45 V module reaches with its sub-2 ns edge, taking that figure as a 20-to-80 time. The load pays for that slew rate twice:

I = V / ZL + CL × dV/dt
(8)

where

V / ZL
the resistive current: a 50 V swing into 50 Ω is a 1.0 A step in load current, and at the +25 V peak of the window the output sources 0.5 A and 12.5 W
CL × dV/dt
the current needed to charge the load capacitance during the edge: 10 pF at 75 V/ns is another 0.75 A, drawn only while the edge is moving

Equation (8) is why a high-voltage fast-edge output is specified into 50 Ω and nothing else, and why hanging a capacitive device directly on the connector slows the edge: the second term competes with the first for the same driver current, and an unterminated line doubles the voltage at its end on top of it. The remedy is a matched line terminated in 50 Ω at the device, with a series resistor from that node into the device, so the generator sees 50 Ω, the device sees the set voltage and not twice it, and the current into the device is bounded by the resistor. Section 26 wires it.

Bandwidth, and the oscilloscope that measures it

f−3dB ≈ 0.35 / t10-90
(9)

where

t10-90
the 10-to-90 percent rise time of a single-pole step response; the relation holds within a few percent for any edge with a Gaussian-like profile

Worked at three edges. A 3 ns TTL edge, by equation (9), carries 117 MHz of content. The Model 765's 70 ps edge, about 105 ps 10 to 90, carries 3.3 GHz, and the Model 765-HV's 630 ps edge at 50 V carries 560 MHz. The same relation turns around to size the oscilloscope: a measured rise time is the quadrature sum of the source's and the scope's own, so a 1 GHz oscilloscope, with its 350 ps step response, reports the 765's 105 ps edge as √(105² + 350²) = 365 ps and has measured its own front end. To report a 70 ps edge within ten percent the scope must contribute no more than √(77² − 70²) = 32 ps between the same thresholds, about 49 ps at 10 to 90, which by the same relation is a 7 GHz instrument. The 765-HV captures in Part II were taken on a wide-band oscilloscope sampling at 40 GS/s, and section 31 tabulates the scope classes.

Width, when the pulse is mostly edge

A narrow pulse is two edges with a short agreement between them. Take the Model 765-HV at its 1 ns minimum width with its published 400 ps rise and 530 ps fall, both 20 to 80 percent. From the 50 percent crossing to the 80 percent level is half the rise, 200 ps; from 80 percent back down to 50 percent is half the fall, 265 ps; so of a 1000 ps pulse measured at half amplitude, about 1000 − 200 − 265 = 535 ps spends above 80 percent of the swing. Half the pulse is edge. Narrow the width much further and the pulse stops reaching full amplitude at all, so 1 ns is the floor of that instrument and 300 ps, with 70 ps edges, is the floor of the Model 765. A minimum width is not a timing limit; it is an edge-rate limit wearing a different unit.

about 535 ps above 80 percent230 ps020508010005001000150020002500Time (picoseconds)Percent of swing765-HV, 1 ns at 50 Vpp765, 300 ps at 5 Vpp20 and 80 percent thresholds
DerivedFigure 3. Two pulses at their published minimum widths, modeled with Gaussian edges from the published 20-to-80 figures. The 765-HV's 1 ns pulse peaks at about 93 percent of its asymptotic swing and spends about 535 ps above 80 percent; the 765's 300 ps pulse reaches its full swing and holds 230 ps above 80 percent. Halve either width and the peak falls away: the minimum width is the edge rate wearing a different unit. The dashed lines are the thresholds every edge figure in this handbook is measured between.

The curve of Figure 3 is a model rather than a capture, so section 17 sets a measured 1 ns pulse beside it. Model and measurement agree on the feature a width budget depends on: a rounded top a few percent short of the full swing, 7 percent in the model and 4 in the capture.

Three different picoseconds

A picosecond specification can describe three independent things, and a buyer who confuses them pays for the wrong one. Placement resolution is the finest step by which an edge may be moved: 250 ps on the Model 577 and 588B, 10 ps on the Model 765 and 765-HV, 1 ps on the Model 745T. Jitter is how far the edge wanders from where it was placed: section 3. Edge rate is how fast the transition happens once it starts. The three are set by different hardware and come in any combination: the 745T places to 1 ps with an edge under 2 ns, the 765 places to 10 ps with an edge of 70 ps, and the 577 places to 250 ps with an edge under 3 ns.

Ask which picosecond

Before comparing instruments, write down which of the three the experiment needs. A pump-probe fine axis needs placement. A coincidence window needs jitter. A laser-diode driver or a radar transmitter needs edge rate. An experiment needing two of the three is the common case and the chapters of Part III say which two.

8Derived requirements

Part I turned into a checklist. Table 2 states what the physics demands of any delay or pulse generator asked to carry a pulsed experiment, each requirement traceable to a section rather than to a brochure. Part II reviews five instruments against it, and a reader can score any vendor with the same nine rows.

Table 2. Nine requirements from six sections of physics. R7 is the quiet one: the moment an experiment outgrows its channel count, intervals start crossing instrument boundaries, and every one that does trades a channel-to-channel number for a trigger-referenced one. R8 and R9 are the ones a counted-clock delay generator does not answer, and the reason the family has three more members.
#RequirementDerived from
R1Channel-to-channel jitter specified, in RMS, tens of picoseconds, because that is the number every internal interval inheritsSections 3, 4
R2Trigger-referenced jitter specified separately, and largerSection 4
R3Insertion delay published, so the earliest-gate arithmetic can be done before wiring daySection 5
R4An internal rate generator good enough to be the master clock of the benchSections 4, 5
R5Delay accuracy in the fixed-plus-proportional form, with resolution far finer than any interval being setSection 6
R6External clock input and output, for house-reference lock and multi-unit coherenceSection 6
R7Enough independent channels, with per-channel modes, gating and routing, that one timebase can carry the whole experimentSections 2, 4
R8Edge rate published with its thresholds, its amplitude and its load, and a minimum width consistent with itSection 7
R9Amplitude and offset window published into a stated load, so the current the output must source is known before the device is connectedSection 7
Part IIThe instruments, reviewedFive instruments measured against the nine requirements of Part I. Every published value carries its condition and its source, and where two documents disagree, the conflict is resolved to a single value. The counted-clock pair comes first, then the three instruments that each answer a different picosecond.

9The family: five instruments, three kinds of picosecond

Berkeley Nucleonics builds five instruments that a buyer searching for a delay generator will meet, and they are not five sizes of one thing. Two of them, the Model 577 and Model 588B, are counted-clock Digital Delay Generators in the sense of Figure 2: many channels, long ranges, 250 ps placement, 50 ps channel-to-channel jitter, and on the 577 output modules up to 45 V. The Model 745T is a Digital Delay Generator built for placement: four channels at 1 ps resolution over 20 seconds, with about 5 ps of jitter at short delay. The Model 765 and Model 765-HV are fast-edge pulse generators that also delay: 70 ps and 400 ps edges, 20 to 80 percent, 10 ps placement, and amplitudes of 5 V and 50 V into 50 Ω. Section 7 named the three picoseconds; Table 3 shows which instrument is built for each.

Table 3. The family on one page, every value into its published load and at its published condition; the per-instrument tables that follow carry the sources. The edge row names its thresholds per cell because the family publishes two conventions, and section 7 carries the conversion. The first row sets the rest: an instrument built for placement is a poor transmitter and an instrument built for edges is a poor sequencer, and the chapters of Part III pair them for that reason.
Model 577Model 588BModel 745TModel 765Model 765-HV
Built forBenchtop sequencingRack sequencingPicosecond placementFast edgesFast edges at 50 V
Channels4 or 812 or 244, plus 4 auxiliary2 or 41 or 2
Placement resolution250 ps250 ps1 ps (A to D)10 ps10 ps
Delay range0 to 1000 s0 to 2000 s0 to over 20 s0 to one period; period up to 8 s0 to one period; period up to 8 s
Channel-to-channel jitter< 50 ps RMS50 ps RMSabout 5 ps RMS below 100 ns delay< 10 ps RMS< 15 ps RMS
Edge< 3 ns, 10 to 90 (TTL)3 ns typical, 10 to 90 (TTL)< 2 ns, thresholds not published< 70 ps, 20 to 80< 400 ps, 20 to 80, to 50 Vpp
Minimum width10 ns10 ns100 ns300 ps1 ns
Output into 50 Ω2 V TTL; 0.8 to 8 V adjustable; 45 V module2 V TTL; 1 to 10 V adjustable2 to 5 V, positive10 mVpp to 5 Vpp, ±5 V window100 mVpp to 50 Vpp, ±25 V window
Maximum rate20 MHz internal, 5 MHz triggered20 MHz internal, 5 MHz triggered1 MHz200 MHz single pulse, 800 MHz quad200 MHz single pulse, 400 MHz multi-pulse
ReviewSections 10 to 14Sections 10 to 14Section 15Section 16Section 17

The counted-clock pair: a benchtop and a rack

The Model 577 is the benchtop: four or eight independent channels behind a display and keypad, made to be driven by hand at a laser table and by script overnight. The Model 588B is the rack system: twelve or twenty-four channels in a 2U chassis, with front-panel status LEDs and no local display, made to be installed once and driven entirely by remote interface. The two share the programming model of Figure 1, 250 ps setting resolution, and the accuracy form of equation (6), so one review serves both.

Table 4 is the published pair at a glance; the engine and I/O detail follows in sections 10 to 13.

Table 4. The published family. Sources: the Model 577 datasheet and manual (Document Version 1.5), the Model 588B datasheet (V1.1) and manual (Document Version 1.0).
Model 577Model 588B
Channels4 (577-4C) or 8 (577-8C)12 (588B-12C) or 24 (588B-24C)
FormatBenchtop, 10.5 × 8.25 × 5.5 in, 8 lb, color display and keypadRack mount, 19 × 10 × 3.50 in (2U) at twelve or twenty-four channels, 8 lb, LED status, no display
Delay and width resolution250 ps250 ps
Delay range0 to 1000 s0 to 2000 s
Width range10 ns to 1000 s10 ns to 2000 s
Internal rate0.001 Hz to 20.000 MHz0.0002 Hz to 20.000 MHz
Timebase100 MHz low-jitter PLL, 50 MHz 50 ppm crystal200 MHz low-jitter PLL, 50 MHz 25 ppm crystal
InterfacesUSB and RS-232 standard; Ethernet and GPIB optionalUSB, RS-232 and Ethernet, all standard
Model 577 front panel with display, keypad and BNC connectors
PhotoFigure 4. The Model 577 benchtop: eight output connectors, A through H, down the left of the panel with the gate and trigger inputs below them, a color display with soft keys, keypad and cursor knob. The display's status line lists all eight channels at once, and the panel itself marks the input pair at 30 V peak maximum, the conservative limit this handbook quotes.
Model 588B rack-mount delay generator, front corner view
PhotoFigure 5. The Model 588B rack unit: twenty-four channel status LEDs, a dual-purpose trigger and gate input beside a sync connector, and a Run button, in 2U of rack height. There is no local display and no controls beyond Run and power: configuration arrives over the remote interfaces of section 14. It is built to be installed once in a facility rack and left there.

The choice between the two, Figure 4 and Figure 5, usually turns on who, or what, drives the instrument. The 577 is the right instrument when a person stands at the bench: the display makes delay scanning and troubleshooting immediate. The 588B is the right instrument when channel count or facility integration rules: twenty-four channels on one timebase means twenty-four intervals that all enjoy the channel-to-channel number of section 4, with no interval forced across an instrument boundary.

10The timing engine, against R1 to R5

Table 5 is the timing specification both models publish, arranged by the requirement each row answers. Every value carries its reference and its source.

Table 5. The timing engine. Sources: 577 datasheet and manual; 588B datasheet and manual. Channel-to-channel jitter is 50 ps RMS on both instruments. Budget every interval you build on either one against that figure.
QuantityModel 577Model 588BAnswers
Channel-to-channel jitter< 50 ps RMS50 ps RMS (output module tables)R1
Internal rate (T0) jitter< 50 ps RMS< 50 ps RMSR4
External trigger jitter< 800 ps RMS800 ps RMSR2
Trigger insertion delay< 110 ns< 160 nsR3
Delay accuracy1 ns + 0.0001 × delay1 ns + 0.0001 × delayR5
Resolution, delay and width250 ps250 psR5
Max external trigger rate1/(200 ns + longest active pulse), 5 MHz ceiling1/(200 ns + longest active pulse), 5 MHz ceilingR2

Two of those rows repay a second look. The 800 ps trigger figure against the 2.89 ns bare-synchronizer bound of equation (4) at 100 MHz says the trigger path resolves arrival phase within the clock period, as section 4 predicted. And the 16:1 ratio between the trigger and channel figures is the measured form of the common-mode cancellation argument: both instruments deliver roughly the same channel-to-channel performance despite different clock rates, because the differential noise of vernier and drivers, not the clock, is what remains after the synchronizer term cancels.

T0Runcommandfront panelor remoteExternaltriggerand gatecomparatorinputsArm, gateand startlogicsystem andper-channelgatingT0 systemtimerinternal rategenerator;burst andChanneltimersdelay andwidth in 250ps stepsOutputmultiplexerup to fivetimers peroutputOutputdriversTTL andadjustablemodulesTimebase200 MHz PLL;externalclock inRedrawn from the Model 588B manual's counter architecture drawing.
SchematicFigure 6. The 588B's architecture, redrawn from its manual: run command and external inputs feed arm, gate and start logic into the T0 system timer, whose internal T0 pulse starts the channel timers, and an output multiplexer routes timers to output drivers. It is Figure 2 of Part I with the labels the products use, and it locates every specification of this section: trigger jitter enters at the left edge, channel-to-channel jitter lives between the channel timers and the output pulse they produce, and the MUX block ahead of the outputs is the routing fabric section 12 exercises.

Behind Figure 6 is the retrigger rule both instruments enforce: the system ignores incoming triggers until every channel has completed its programmed pulse. The manual's own worked example is exact: with 100 µs widths and a 50 µs delay, no trigger can be honored faster than every 150 µs, about 6.7 kHz, however far below the 5 MHz ceiling that is. The 588B adds a stated budget: delay plus width plus 75 ns of hardware reset must fit inside the T0 period, or pulses are dropped.

11Outputs, and the arithmetic of a 50 ohm world

Every amplitude specification in this section names its load, because the load is half the number. The physics is one voltage divider: a source of impedance ZS driving a load ZL delivers

Vload = Vopen × ZL / (ZS + ZL)
(10)

where

Vopen
the open-circuit swing the driver produces
ZS
the output impedance, 50 Ω for the TTL mode here
ZL
the load: 50 Ω for a terminated line, about 1 MΩ for a bare oscilloscope input

The Model 577 manual's own output table is the worked example, and it is reproduced exactly because the load is half of every amplitude number. Table 6 adds the third load the other documents publish and the divider arithmetic of equation (10) beside each row.

Table 6. The Model 577 TTL/CMOS output (50 Ω output impedance) into its three published loads. Sources: the 577 manual for the 1 kΩ and 50 Ω rows, the comparison-era datasheet material for high impedance. The halving is not a defect; it is equation (10) doing what it must. The trap it lays is a logic-level one: 2.0 V meets a TTL input threshold of 2.0 V with no margin at all and misses every 5 V CMOS input threshold outright, 3.15 V for HC parts and 3.5 V for 4000-series, so a terminated line into CMOS-gated hardware needs the high-current option below.
LoadPublished TTL levelThe divider says
High impedance4.0 V typicalthe full open-circuit swing
1 kΩ4.0 V typical1000/1050 = 0.95 of the swing, printed as 4.0 V
50 Ω2.0 V typical50/100 = exactly half: 4.0 V becomes 2.0 V
Adjustable mode on the same module is published at 2.0 to 20 VDC into 1 kΩ and 0.8 to 8.0 VDC into 50 Ω against a 75 Ω source impedance, and 50/(50+75) = 0.4 reproduces the second range from the first, reading the published 1 kΩ figures as the open-circuit swing they approximate at 1000/1075 = 0.93 of it. The datasheet's older 1 to 10 V into 50 Ω lineage implies a 50 Ω source. The 0.8 to 8.0 V pair is the range to design against.

The module options answer the traps the standard output leaves open. The TZ50 high-current option holds at least 4 V of TTL drive into a 50 Ω load, for terminated lines that must still clear CMOS thresholds. The AT35 and AT45 options raise the ceiling for Pockels cell drivers and other stiff loads: the AT45 delivers 4 to 45 V in 20 mV steps, with published rise times below 2 ns into low impedance and below 9 ns into high impedance, a 150 V total-amplitude budget across the system, no short-circuit protection, and a stated limit of four channels. Optical output and input modules (820 and 1300 nm, ST fiber) carry triggers across kilovolt-potential gaps, at a price the datasheet states plainly: the optical input adds its own insertion delay below 300 ns and jitter below 1.4 ns RMS. Every one of those numbers is a published module specification, quoted with its condition, and the AT45's amplitude floor is the corrected table value, 4 V, not the 5 V its own datasheet prose once said.

12Routing, gating and modes: R7 at work

Channel count only matters if the channels can be shaped and combined. Three mechanisms do the shaping on both instruments; the oscilloscope captures in this section are from the Model 588B manual, evidence rather than illustration, and the mechanisms they record are common to both instruments.

The multiplexer

Ahead of each output driver is an OR fabric. On the Model 577, any or all channel timers may be OR'd onto any output, an 8-bit mask per output; on the Model 588B, up to five timers may be routed to each output. Only timing is multiplexed, not amplitude: the output level is the output module's. The fabric turns channel timers into an instruction set, and the two captures below, Figure 7 and Figure 8, are its two canonical programs.

Oscilloscope capture of two channel timers multiplexed into a double pulse on one output
MeasuredFigure 7. Double pulse from one output, no extra hardware: the lower two traces are two channel timers programmed with offset delays, and the top trace is one output carrying both, because both timers are routed to it through the multiplexer. Twice per period, one connector. This is how a pump laser gets a pre-pulse, or a camera a bracketing pair, without consuming a second cable run.
Oscilloscope capture of one output alternating between wide and narrow pulses
MeasuredFigure 8. Alternating pulse width on a single output: the middle trace is a narrow-pulse timer firing every period, the bottom trace is a wide-pulse timer in duty-cycle mode firing every other period, and the top trace is one output carrying both. Where the wide pulse fires it covers the narrow one, so the output alternates wide, narrow, wide, narrow: a two-state program written entirely in timing registers. Substitute any shapes and any on-off pattern up to millions of pulses and the mechanism is unchanged.

Gating

Both instruments accept a gate input that can enable or inhibit output, globally or per channel, active high or active low. The two inhibit flavors differ in one respect a laser bench cares about: pulse inhibit lets a pulse in progress finish and blocks the next one, while output inhibit cuts the output immediately. The Model 588B adds channel-timer gating, GATA as a global gate, GATB as a bank gate and INHB as a bank inhibit, so one timer channel can gate a group of others with no external wiring at all. Figure 9 is the behavior on the glass.

Oscilloscope capture of two gated channels inhibited during a gate window while a third runs
MeasuredFigure 9. One gate, three verdicts: the bottom trace is the gate, the top channel ignores it, the second channel is inhibited while the gate is high, and the third runs only while the gate is high. Per-channel gate modes let one input silence one bank and enable another in complement, which is the interlock pattern of Part III: a safety shutter or ready signal holds off the hazardous channels while diagnostics keep running on the same instrument.

Per-channel modes, and divide-by-N

Figure 10 includes the mode that quietly replaces a rack of dividers. Duty cycle with an on-count of 1 and an off-count of N − 1 fires every Nth pulse, which is the divide-by-N function of older pulse generators as a special case; the manual of the earlier Model 588, the 588B's predecessor, states the equivalence in those terms. A photodiode watching an 80 MHz oscillator, a channel dividing by 80,000, and the experiment runs at 1 kHz in lockstep with the laser's own clock. Burst counters reach 10,000,000 per channel on both models, and 4,000,000,000 at system level on the 588B; wait counts let a channel hold off for a programmed number of periods before joining.

Oscilloscope capture of single shot, burst, duty cycle and continuous channel modes
MeasuredFigure 10. Four channel personalities against one trigger, one instrument, one capture: a single-shot channel that fires once, a burst channel that fires a programmed count, a duty-cycle channel that fires a pattern, and a continuous channel. Modes are per channel, so one instrument runs the one-off camera arm, the thousand-shot acquisition burst and the always-on sync from the same trigger.

Two referencing features complete the set. A channel may take another channel, rather than T0, as its sync source, so a chain of events can be programmed as relative offsets that survive retuning of the head of the chain, and the 577 documentation describes referencing one channel against another in positive or negative time, its negative-delay feature. Circular chains are refused by the firmware. The instruments' own captures of independent per-channel rates and of negative delay are reproduced in the datasheet set; the negative-delay capture shows one channel firing ahead of the reference channel's edge, which is only possible because everything is programmed against the same future T0.

13Clocks in, clocks out, and staying coherent

R6 asks that the instrument accept the house ruler and offer its own. Both comply, differently enough to matter. The Model 577 accepts an external clock from 10 to 100 MHz in discrete steps and can emit T0 or a reference output over the same range. The Model 588B accepts a discrete list, 10, 20, 25, 30, 40, 50, 60 or 80 MHz, and emits T0 or 10 to 100 MHz; its manual's preliminary appendix mentions electrical acceptance to 100 MHz, but 80 MHz is the top of every published selectable list, so 80 MHz is the number to design against. The earlier Model 588, which the 588B replaces, documents its clock input's sensitivity separately: 50 mV to 2.5 V peak, minimum pulse width 100 ps, insertion delay of the clock path at most 10 ns, a specification written for one use, the photodiode watching a modelocked laser.

clockwindowgatepulseamplifiedLaser oscillatormodelocked, 80 MHz train;photodiode clock outDelay generatorexternal clock in; countsthe oscillator's ownperiodsPulse pickerPockels cell; one pulseof NAmplifier gateregenerative or multipassExperimentcamera, digitizer, probeRedrawn from the earlier Model 588 datasheet's external-clock setup.
SchematicFigure 11. The canonical lock-up, redrawn from the datasheet set: a laser oscillator's own clock output drives the delay generator's clock input, and the generator's channels then drive the pulse picker and amplifier of the same laser chain. Everything downstream counts on the laser's oscillator, so the picker window and the amplifier gate cannot walk against the pulse train they select from. This one diagram is why the external clock input exists.
020406080100Oscillator train80 MHz, 12.5 ns apartPicker window13 ns minimum, placed by the generatoropenPicked pulseone of every NselectedTiming errorthe bound±6 nsTime (nanoseconds)Pulses 12.5 ns apart; a 13 ns window centered on one of them has about 6 ns of placement margin before itadmits the wrong pulse. The window is selectable from 13 ns to 1.3 s.Redrawn from the earlier Model 588 datasheet's pulse-picking drawing.
SchematicFigure 12. Pulse picking, timed, redrawn from the datasheet set: from an 80 MHz oscillator train, the picker window lifts one pulse, or a short run of them, down to a 1 kHz experiment rate, and the drawing carries its own engineering bound: picking becomes unstable when timing error approaches 6 ns, because at an 80 MHz train the pulses are 12.5 ns apart and a window wandering by half a period no longer selects the pulse it meant to. The selectable window is 13 ns to 1.3 s.

Figure 11 and Figure 12 together are the coherence argument of section 6 made concrete: lock the generator to the oscillator and the 6 ns bound of Figure 12 is met with room to spare, because a clock-locked window counts the oscillator's own periods and tracks the train by construction. The Model 588B manual's external-clock appendix publishes 300 ps cycle-to-cycle and 1 ns period jitter for that path, both preliminary. No equivalent measurement exists for the Model 577, so its margin belongs on the wiring-day checklist of section 29 before an experiment depends on it. Trigger the picker from an unlocked box instead and the 800 ps trigger figure plus drift eats the margin.

14Remote operation

Both instruments speak the same command family over their serial paths: SCPI-style ASCII, with every front-panel function reachable as a command. The Model 577 carries USB and RS-232 as standard with Ethernet and GPIB as a factory communications option; the Model 588B carries USB, RS-232 and Ethernet as standard, and since it has no front panel display, the remote path is not an option but the instrument's face. A supplied Windows control application exposes every 588B channel, the system modes and a command terminal, and requires no installation. Configuration storage is on board: 16 named setups on the 577, one per channel count on the 588B, 12 or 24, with a factory-default configuration zero that cannot be overwritten. For scripted work the practical numbers are the defaults: 115200 baud on RS-232, 38400 on the 588B's USB port, and a stated 10 ms command pacing at full rate on the 588B.

Which path to use for what

Use the front panel, on the 577, for bring-up and troubleshooting: a delay scan with a knob finds an optimum faster than an edit-compile loop. Use the remote interface for anything repeated: a pump-probe scan of two hundred delay points is a for-loop, and section 21 budgets one. Use stored configurations for the handoff between them, so the state a human tuned is the state the script recalls.

15The Model 745T: placement at one picosecond

Moving an edge in 1 ps steps takes a different architecture from moving it in 250 ps steps, and the Model 745T is built around that difference. Four high-resolution channels, A to D, set delay in 1 ps steps from zero to more than 20 seconds; four auxiliary channels, E to H, are an option at 1.25 ns resolution for the housekeeping edges. The 1 ps step is 250 times finer than the counted-clock pair, and the architecture that buys it is visible in Figure 14: a delay reference block ahead of the high-resolution channels, which is the vernier of section 4 promoted to the center of the design, and a timebase whose stability is specified in parts per ten million rather than parts per hundred thousand.

Model 745T front panel with touchscreen and eight BNC outputs
PhotoFigure 13. The Model 745T: a compact benchtop, 215 by 245 by 135 mm and under a kilogram, with the four high-resolution outputs A to D and the auxiliary E to H on the right, gate and trigger inputs below the touchscreen, and a run button. The screen shows the per-channel delay, reference, amplitude and width fields; the instrument is also driven from an embedded web server over Ethernet, which is how a scan of two hundred picosecond steps is written.
startClock in10 MHz reference,or internalTimebase0.5 ppm; 0.05 ppmoptionDelayreferencethe vernier, madefirst-classFourhigh-resolutionchannelsA to D, 1 ps stepsOutputs A toD, and T02 to 5 V into 50 ΩExternaltrigger,gate, run0.1 to 5 VthresholdPrescalerand twotimersdivide to 65,535;0.25 Hz to 1 MHzTriggercontrollersingle,repetitive, burst,gatedFourauxiliarychannelsE to H, 1.25 nssteps, optionOutputs E toHoptionInterfacecontrollerfront panel, USB,Ethernet webserverRedrawn from the Model 745T datasheet block diagram; the grey boxes are the eight-channel option.
SchematicFigure 14. The 745T's architecture, redrawn from its datasheet. External trigger, prescaler, two internal timers, gate and run control feed one trigger controller; the timebase feeds a delay reference that disciplines the four high-resolution channels; the four auxiliary channels and their outputs are the option. The T0 output is the instrument's own time zero, offered to the bench so every other instrument can be referenced to it. Compare Figure 2: the delay reference block is the vernier made first-class.

Table 7 gives the published timing engine of the instrument in Figure 13, with a condition on every row. Note the resolution row: 1 ps is the front-panel step, and the remote interface accepts finer settings.

Table 7. The Model 745T timing engine. Sources: the Model 745T datasheet (V11/20) and user manual (NUT 083, Ed. 1.0).
QuantityModel 745TCondition
Channels4 high-resolution (A to D); 4 auxiliary (E to H) optional745T-4C and 745T-8C
Delay resolution1 ps on A to D; 1.25 ns on E to Hfront-panel step; the remote interface accepts finer settings
Delay range0 to more than 20 s
Jitter, short delayabout 5 ps RMSdelay below 100 ns, internal or external trigger, typical
Jitter, long delay25 ps + delay × 10−7 RMSexternal trigger to any output
Delay accuracy< 250 ps + delay × 10−7A to D
Timebase0.5 ppm TCXO standard; 0.05 ppm OCXO option
Insertion delay< 65 nsexternal trigger to output
Output, A to D2 to 5 V into 50 Ω, positive only; width 100 ns to 10 µs in 5 ns stepsrise under 2 ns maximum, 900 ps typical, thresholds not published
Maximum rate1 MHzexternal repetitive or internal timers
Trigger input0.1 to 5 V threshold into 50 Ω, either slope, prescaler to 65,535
Clock10 MHz in, 10 or 100 MHz out, ±1 V into 50 Ωa faster reference input is a factory option
InterfacesFront panel, USB to UART, Ethernet with embedded web server4 stored setups; board-level 745-OEM variant
0501001502002501 ns10 ns100 ns1 µs10 µs100 µs1 ms10 ms100 msabout 5 to 8 ps below 100 ns15 to 20 ps plateau: vernierand driver floortimebase termProgrammed delayRMS jitter (picoseconds)External triggerInternal trigger
DerivedFigure 15. RMS jitter against programmed delay, replotted from the measured chart in the 745T manual's annex: about 5 to 8 ps out to 100 ns, a plateau near 15 ps internally triggered and 20 ps externally triggered from 1 µs to 10 ms, and a climb to about 225 ps at 100 ms. The plateau is the vernier and driver noise floor of section 4; the climb at long delay is the timebase, delay times its fractional instability, and the reason a 0.05 ppm oscillator option is offered. The two curves nearly coincide, which says the trigger path adds almost nothing: the opposite of the 16:1 ratio the counted-clock pair shows in section 10.

Set against the family table, the 745T's 5 ps places an edge ten times more repeatably than the 577 or 588B. Its 1 ps step is also finer than its own scatter, and that is the useful order: average enough shots and the scan resolves its own step. What the instrument gives up is in the output row of the table. Two to five volts, positive only, 100 ns minimum width, 1 MHz maximum rate: these are trigger edges for other instruments, not drive for a load. The 745T is the master clock of a picosecond bench, and sections 25 and 27 pair it with a fast-edge generator for that reason.

01020304050Output T1narrow option, 10.00 ns10 nsOutput T3narrow option, 5.00 ns5 nsStandard channel100 ns minimum width100 ns and wider: runs past this axisTime (nanoseconds)Widths of 10 and 5 ns as the datasheet capture shows them, 2 V per division and 5 ns per division atsource.Drawn from the Model 745T datasheet's narrow-pulse capture.
SchematicFigure 16. The narrow-pulse option, drawn from the datasheet capture: the option's two outputs, the datasheet's T1 and T3, at 10.00 and 5.00 ns width against the 100 ns minimum of a standard channel. The option makes a pair of outputs by mixing two channels, so the width is a difference of two 1 ps delays and is itself adjustable in 1 ps steps. It is the multiplexer idea of section 12 used for width rather than for routing.
020406080100120140External clock80 MHz, 12.5 ns apartChannel Atimer 1, delay 0every 8th clockChannel Btimer 1, delay 30 nsChannel Ctimer 2, independentits own periodChannel Dsingle shot on commandone pulse, pickedTime (nanoseconds)Timer 1 divides the 80 MHz clock to produce channel A; channel B follows at a delay placed in 1 ps steps;timer 2 drives channel C on its own schedule; channel D fires once when commanded.Redrawn from the 745T datasheet's pulse-picking example.
SchematicFigure 17. Pulse picking on the 745T, redrawn from its datasheet: an external clock, 80 MHz in the example, is divided by timer 1 to produce channel A, channel B follows at a programmed delay, timer 2 runs channel C independently, and channel D fires once on command. It is the same lock-up as the counted-clock pair in section 13, with the window now placed to 1 ps against a 12.5 ns pulse spacing.

Against the counted-clock pair, the 745T adds two tools to a laser bench, Figure 16 and Figure 17: a pair of outputs whose width is a difference of picosecond delays, and a picking window placed to 1 ps against the oscillator's own period. Section 13 gave the stability bound for picking, 6 ns on an 80 MHz train; the 745T's margin against it is three orders of magnitude.

16The Model 765: the 70 picosecond edge

The Model 765 is a pulse generator first and a delay generator second, and the order matters. Its two or four outputs are 50 Ω sources with an analog edge converter behind each one, and the published edge is under 70 ps between 20 and 80 percent at 5 V peak-to-peak into 50 Ω, under 105 ps between 10 and 90. By equation (9) that is a 3.3 GHz signal, nearly thirty times the bandwidth of a TTL delay-generator output, and by equation (7) a slew of 43 V/ns. Every timing parameter (delay, width and period) is set in 10 ps steps, so the instrument also places edges 25 times finer than the counted-clock pair, over a shorter range: a delay on the 765 spans from zero to one period, and the period can be anything from 5 ns to 8 s.

Model 765 front panel with touchscreen, keypad and four SMA outputs
PhotoFigure 18. The Model 765, four-channel: a 3U rack-width instrument with a seven-inch touch interface on the left, a knob and keypad, four SMA outputs on the right at the top, and the trigger in and trigger out pair at lower right beside two USB ports.

Behind the touch interface of Figure 18 is the instrument's own control application, running on an embedded Windows platform; remote control is SCPI over a LAN connection, with a free software development kit for the usual languages. Table 8 is the published timing and output specification, every row into 50 Ω.

Table 8. The Model 765 published values. Source: the Model 765 datasheet (V1.22) and user manual (Rev B). The 30 ps jitter figure is trigger in to trigger out; trigger-input to pulse-output jitter is not a specified quantity, so an externally triggered budget is verified at the bench.
QuantityModel 765Condition
Channels2 or 4765-2C, 765-4C
Amplitude10 mVpp to 5 Vppinto 50 Ω; any window within −5 to +5 V, offset ±2.5 V
Amplitude resolution1 mV below 250 mVpp; 4 mV aboveinto 50 Ω
Edge, 20 to 80 percent< 70 psrise and fall, into 50 Ω
Edge, 10 to 90 percent< 95 ps at 1 Vpp; < 105 ps at 5 Vppinto 50 Ω
Overshoot< 5 percent
Width300 ps to period minus 300 ps10 ps steps; offset at zero
Period5 ns to 8 s10 ps steps
Rate200 MHz single pulse; 400, 600, 800 MHz in double, triple, quadruple modemulti-pulse modes OR several timers onto one output
Delay0 to period10 ps steps, ±(0.1 percent + 100 ps)
Period jitter4 ps RMS200 MHz output, 100 Hz to 10 MHz integration, all channels at one frequency, single pulse, continuous
Channel-to-channel jitter< 10 ps RMSsame condition
Width jitter< 10 ps RMSsame condition
Trigger in to trigger out< 30 ps RMS; delay < 100 nstrigger input at or below 15 MHz
Trigger input50 Ω or 1 kΩ; ±8 V threshold in 10 mV steps; 40 MHz; 1 ns minimumprescaler to 65,535 per channel
External width inputto 1 GHzoutput follows the input width
Timebase±2 ppm; clock in 10 to 100 MHz; clock out 10 MHz or the input frequency±1 ppm per year aging
Format3U, 19 inch rack width, 445 by 135 by 320 mm, 9.7 kg, 120 Wrack kit optional

Multiple pulses from one output

The feature that turns a two-channel instrument into a pattern source is the multi-pulse mode. Each output can carry one, two, three or four pulses per period, each with its own delay and width, and the whole group repeats at the period. In effect, one connector carries a four-pulse pattern; Figure 19 gives the timing and Figure 20 a capture.

020406080100Trigger inexternal edgeedgeTrigger outfixed offset, fixed widthoutOutput 1, doubledelays P1 and P2 from trigger outP1P2Output 4, quadrupledelays P1 to P4 from trigger outP1P2P3P4Time (arbitrary units)Each pulse of a group has its own delay and width; every delay is measured from the trigger-out edge plusthe output's initial delay, so the pulses within a group are channel-to-channel intervals.Redrawn from the Model 765 manual's single-mode multiple-pulse drawing.
SchematicFigure 19. Multi-pulse timing on the Model 765, redrawn from its manual. A trigger in produces a trigger out after a fixed offset; output 1 in double mode fires two pulses at delays P1 and P2 plus the output's initial delay; output 4 in quadruple mode fires four. Every delay is from the same trigger-out edge, so the pulses within a group are placed by one timebase and never cross a trigger input.
Oscilloscope capture of a gate pulse and a double pulse on one output
MeasuredFigure 20. Double-pulse mode, measured, from the manual: the upper trace is a gate, the lower trace is one output carrying two pulses of equal width inside it, with no second channel consumed. The capture carries no scale annotations and is reproduced for the shape. It is the multiplexer trick of section 12 with 10 ps placement and 70 ps edges, and section 24 uses it to put four radar targets on one cable.

The 800 MHz on the datasheet cover comes from this mode. Four pulses per 5 ns period on one output is an 800 MHz pulse train, and in external-width mode the output will follow an input to 1 GHz; a single pulse per period reaches 200 MHz. Quote the mode with the rate, as an amplitude is quoted with its load.

17The Model 765-HV: fifty volts in four hundred picoseconds

The Model 765-HV is the Model 765's architecture built for amplitude. One or two outputs swing up to 50 V peak-to-peak into 50 Ω, anywhere within a window of −25 to +25 V, with a rise under 400 ps between 20 and 80 percent at the full 50 V and offset at zero. Run through section 7, those figures become 75 V/ns of slew, a 1 A step in load current, 0.5 A and 12.5 W at the 25 V peak, and a 10 pF load adding another three quarters of an ampere during the edge. The instrument draws 300 W from the line to do it. It is the only output in the family built to drive a load rather than signal one, and the radar, lidar and semiconductor chapters of Part III depend on it.

Model 765-HV front, three-quarter view, with two SMA outputs and a touchscreen
PhotoFigure 21. The Model 765-HV, two-channel: the same 3U platform as the 765, with the two outputs on the upper right marked 50 Vpp maximum, trigger in and out at lower right, and the touch interface at left. The carry handle is on the side; the rear panel, not visible here, carries the clock in and out, the LAN ports and the PC-style connectors.

Table 9 specifies the two-channel instrument of Figure 21: every amplitude into 50 Ω and every edge with its threshold pair, because on this instrument the two conventions differ by 230 ps.

Table 9. The Model 765-HV published values. Source: the Model 765-HV datasheet (V1.3). The fall is slower than the rise at every threshold pair and amplitude, by a third at 50 Vpp; a pulse-width budget uses both, as section 7 did. The 400 MHz figure belongs to the multi-pulse and external-width modes; a single pulse per period reaches 200 MHz.
QuantityModel 765-HVCondition
Channels1 or 2765-HV-1C, 765-HV-2C
Amplitude100 mVpp to 50 Vppinto 50 Ω; no high-impedance figure is published
Window−25 to +25 VDC offset ±25 V adjustable; baseline at −25, −12.5, 0, +12.5 or +25 V
Rise, 20 to 80 percent< 400 psup to 50 Vpp, offset at zero
Rise, 10 to 90 percent< 570 ps to 25 Vpp; < 630 ps to 50 Vppoffset at zero
Fall, 20 to 80 percent< 430 ps to 25 Vpp; < 530 ps to 50 Vppoffset at zero
Fall, 10 to 90 percent< 640 ps to 25 Vpp; < 840 ps to 50 Vpp
Overshoot< 8 percent to 25 Vpp; < 5 percent from 25 to 50 Vpp
Width1 ns to period minus 1 ns10 ps steps; offset at zero
Period5 ns to 8 s10 ps steps
Rate200 MHz single pulse; 400 MHz double, triple, quadruple; 400 MHz external widthexternal width at 50 percent duty
Delay0 to period10 ps steps, ±(0.1 percent + 100 ps)
Period jitter15 ps RMSall channels at one frequency, single pulse, continuous
Channel-to-channel jitter< 15 ps RMSsame condition
Width jitter< 10 ps RMSsame condition
Trigger in to trigger out< 30 ps RMS; delay < 100 nstrigger input at or below 15 MHz
Trigger input, timebase, clockas the Model 765section 16
Format3U, 19 inch rack width, 9.7 kg, 300 W

The evidence, at 40 gigasamples per second

Four captures of a Model 765-HV follow, all taken on a 40 GS/s oscilloscope into 50 Ω, each with its on-screen measurement table reproduced. Each was chosen so that it can be checked against a row of the specification table above.

Oscilloscope capture of a single 1 ns pulse of 48 V amplitude with a measurement table
MeasuredFigure 22. The headline, measured: one pulse of 981.6 ps width and 47.98 V amplitude from a baseline near −24 V, at 10 V and 5 ns per division. Over 2,895 acquisitions the width averaged 1.0014 ns with 12.4 ps of standard deviation, a figure that includes the oscilloscope's own timing noise on top of the published width jitter of under 10 ps, and the amplitude averaged 47.9 V. At its minimum width the pulse still reaches 48 V, and the top is rounded rather than flat, which is what section 7 predicted for a pulse that spends about half a nanosecond above 80 percent of its swing.
Oscilloscope capture of a 20 ns pulse at 24 V with rise, fall and overshoot measurements
MeasuredFigure 23. The edge, measured at 24.15 V and a 20 ns width, averaged, 5 V and 5 ns per division: rise 361 ps between 20 and 80 percent and 528 ps between 10 and 90, fall 382 and 569 ps, overshoot 5.2 percent. Every one of those is inside its published limit for the up-to-25 Vpp condition, 400, 570, 430 and 640 ps, and the 20-to-80 figure has 10 percent of margin. The ratio of the two rise figures, 1.46, is the Gaussian 1.52 of section 7 with a slightly cleaner foot.
Oscilloscope capture of a 200 MHz train of 1 ns pulses at 43 V amplitude
MeasuredFigure 24. The rate, measured: a train of 996 ps pulses at 200.25 MHz and 42.93 V amplitude, 2 ns per division, with the width averaging 998.75 ps and 12.8 ps of standard deviation over 4,580 pulses. This is the single-pulse-mode ceiling of 200 MHz at the minimum width and 86 percent of full amplitude, on one output. The 400 MHz figure in the table is reached with two or more pulses per period on that output; it is not a second instrument, it is the same edge converter fired more often.
Oscilloscope capture of two 50 V pulses of 50 and 100 ns width on two channels
MeasuredFigure 25. Both outputs at once, measured, 10 V and 50 ns per division: scope channel 2 carries one output at 50.4 V peak-to-peak and 49.99 ns width, scope channel 3 the other at 49.4 V and 99.98 ns, offset in time from each other, with 13.8 and 12.6 ps of width standard deviation over about 300 pulses each. Two independent 50 V pulses with independent widths from one instrument, which is the two-channel configuration's reason to exist: a transmit pulse and a receiver gate, a stress pulse and a readout pulse, from one timebase.
Model 765-HV, 50 V in 400 ps75 V/nsModel 765, 5 V in 70 ps43 V/nsModel 577 AT45 module, 45 V in under 2 ns13.5 V/nsTTL module, published minimum0.5 V/nsSlew rate, 20 to 80 percent0.6 × amplitude over the 20-to-80 rise; AT45 at a 2 ns edge
DerivedFigure 26. Slew rate across the family, derived from the published edge and amplitude of each output by equation (7). The 765-HV's 75 V/ns is about five times the high-voltage module of the counted-clock pair and 150 times a TTL output. Slew is the quantity a laser diode, a Pockels cell or a radar antenna feels; amplitude and edge on their own are only its two factors.

Read the four captures as one argument. Figure 22 is the width floor at full amplitude; Figure 23 is the edge inside its limits with margin; Figure 24 is the rate ceiling at that width and nearly that amplitude; Figure 25 is two of everything at once. Figure 26 then places the instrument in the family: not the finest placement and not the fastest edge, but the highest slew rate, 75 V/ns against the 765's 43 V/ns.

What the HV is for, in one sentence

Any load that needs tens of volts to do anything and needs them to arrive in well under a nanosecond: a laser-diode or electro-optic driver, a radar or ground-penetrating transmitter, a semiconductor stress or short-pulse test, a Pockels cell or photomultiplier gate, a high-power microwave modulator trigger that wants a real edge. For a logic-level trigger edge the Model 745T or 577 is the right instrument and the HV's 300 W buys nothing.

18Where these instruments are not the answer

Every instrument in the family has boundaries set by its physics, and a bench designed past one of them fails on wiring day. The boundaries below carry numbers and sources, as the specifications do, and Part III routes around each one where a route exists.

Part IIIThe benches, wiredApplication recipes at wiring level: worked numbers for every bench, and a channel map wherever the wiring is the lesson. One design rule runs through them, the generator as the master clock of the bench; the four fast-pulse chapters add a second, the edge rate as the quantity the load feels; and both rules reach their limit at the streak camera of the last chapter. The laser, radar, semiconductor and detector values quoted throughout (upper-state lifetimes, flashlamp delays, build-up jitter, soil permittivities, cell programming windows and detector spreads) are standard literature and practice values, not Berkeley Nucleonics specifications.

19The Q-switched laser, and the delay that is an energy knob

Most of Part III is variations on one skeleton, so it is built once, here, on the commonest pulsed laser in the laboratory. A flashlamp-pumped, Q-switched Nd:YAG stores pump energy in its upper laser level, whose fluorescence lifetime is about 230 µs. While the cavity is held closed, the lamp pumps population in and spontaneous decay drains it out, so the stored inversion rises, peaks and falls. Opening the Q-switch at the peak dumps the maximum energy into one nanosecond-class pulse; opening off-peak yields less. The flashlamp-to-Q-switch delay is therefore not merely a setting, it is the laser's pulse-energy control, and it touches no optics.

The arithmetic that makes the knob quantitative: waiting an extra 50 µs past the optimum loses roughly 1 − e−50/230, about 20 percent, of the stored inversion to spontaneous decay; an extra 23 µs costs about 10 percent. A delay swept from 100 to 250 µs in 1 µs steps maps the whole energy curve in 150 shots, and against that sweep the instrument's contribution is invisible: at a 180 µs setting the accuracy bound of equation (6) is 19 ns, fifty times finer than the step, and the shot-to-shot scatter is 50 ps, more than four orders below the step.

050100150200250Flashlampchannel AStored energylaser physicsinversion builds, then decaysQ-switchchannel Bopen at the peakLight outafter build-uppulse (ns-class)Time (microseconds)Move the channel-B delay and the output energy follows the stored inversion curve: the delay is the energyknob.
SchematicFigure 27. The skeleton of half of experimental laser physics. The lamp fires at time zero, and the shaded band marks the interval the inversion is stored, from pump to dump; the true stored-energy curve rises against its 230 microsecond decay and peaks near 180 microseconds, which is where the Q-switch channel opens the cavity here. The optical pulse emerges tens of nanoseconds later, after build-up from noise, an offset drawn far wider here than its true scale so it can be seen at all on a microsecond axis. That build-up interval jitters by tens of nanoseconds shot to shot, which is why anything needing the true emission time watches a photodiode rather than trusting the Q-switch edge.

Table 10 is the channel map, the format every following recipe reuses. The photodiode row carries the laser's own contribution: the electrical schedule is exact to picoseconds, but the laser adds its own tens-of-nanoseconds build-up jitter on top, so downstream picosecond work re-references to measured light, per Figure 27.

Table 10. The Model 577 as the master of a Q-switched bench, internal rate generator at 10 Hz. Every interval is channel-to-channel, so every interval enjoys the 50 ps figure; the trigger input is not used at all, which is the design rule of Part III applied with nothing left over for it to fix.
ChConnects toDelayWidthWhy
AFlashlamp driver trigger010 µsStarts the pump; the lamp supply shapes the current, the edge only starts it
BQ-switch (Pockels cell) driver180 µs, tuned 100 to 250 µs100 nsOpens the cavity at peak inversion; this delay is the energy knob
CCamera or experiment gate180.1 µsas neededCoarse sync; carries the laser's build-up jitter, see the photodiode row
DDigitizer trigger179.9 µs1 µsPre-trigger so the acquisition window brackets the light
PDPhotodiode on a pick-off, to any ps-critical inputn/an/aRe-references downstream timing to actual photon arrival

20Particle image velocimetry: two pulses, one number

PIV measures a flow by photographing seeded particles twice, a known interval Δt apart, and correlating the two frames: velocity is displacement over Δt. The relative velocity error therefore contains the relative timing error directly,

δv/v = δ(Δt)/Δt
(11)

where

Δt
the pulse separation, sized so particles move a few pixels between frames
δ(Δt)
the shot-to-shot error of that separation, which is a jitter figure from Part II

Sizing first: at 20 µm per pixel and a 10 m/s flow, a 5 pixel target displacement is 100 µm, so Δt = 10 µs. Now equation (11) prices the architecture. Both Q-switch channels on one instrument's internal clock: 50 ps on 10 µs is 5 × 10−6, three orders below the correlation error of about one percent, invisible. The same two edges built across the external trigger path instead: 800 ps gives 8 × 10−5, sixteen times worse, still survivable at this Δt. But fast flows shrink Δt: at 100 ns the external-trigger figure is 0.8 percent of the measurement, as large as the correlation error itself, while the channel-to-channel figure is still only 0.05 percent. The design rule of Part III is worth a factor of sixteen here, and the factor lands exactly where the measurement is hardest.

050100150200250Camerachannel Eframe Aframe BtriggerLaser 1channels A, Bpulse 1Laser 2channels C, Dpulse 2Time (microseconds)The camera is triggered at 175; its frame transition, a camera-specific offset later, falls between thepulses at 180 and 190, so pulse 1 ends frame A and pulse 2 opens frame B.
SchematicFigure 28. Frame straddling, the trick that frees the pulse separation from the camera. The frame boundary falls between the two laser pulses, so a camera whose frame period is milliseconds still delivers image pairs 10 microseconds apart, and the pulse separation can shrink until it meets the camera's one hard limit, the interframe transfer time, typically a hundred nanoseconds and more, set by the sensor. The whole scheme is five delay numbers on one instrument.

Figure 28 places the pulses; Table 11 shows why a dual-cavity PIV system uses four laser channels rather than two. Each head keeps its own flashlamp-to-Q-switch delay, its energy knob from section 19, while Δt is set by sliding head 2's pair together. Energy balance and pulse separation stay independent, which is what makes the system tunable in the field.

Table 11. Dual-cavity PIV on a Model 577. Sweeping Δt means changing two numbers, C and D, by the same amount; balancing energies means trimming A-to-B or C-to-D individually.
ChConnects toDelayWidthWhy
ALaser 1 flashlamp010 µsPump head 1
BLaser 1 Q-switch180 µs100 nsPulse 1; the A-to-B interval is head 1's energy knob
CLaser 2 flashlampΔt = 10 µs10 µsPump head 2, shifted whole
DLaser 2 Q-switch180 µs + Δt100 nsPulse 2, exactly Δt after pulse 1; C-to-D stays head 2's energy knob
ECamera frame trigger175 µsper cameraPlaces the frame boundary between the two pulses

The field evidence behind Table 11 is the Berkeley Nucleonics PIV technical note, the published record of this wiring in working installations: the four-signal dual-laser architecture is its recommended hookup, the direct dependence of velocity on Δt is its central caution, and the channel map above compresses its guidance into one table. The practical consequence it documents is operational: a facility that changes flow regime retunes two delay numbers and touches no optics, which is why this wiring survives operator handoffs that would break an optically trimmed bench.

21Pump-probe: the delay axis is the data axis

Time-resolved spectroscopy launches a process with a pump pulse and samples it with a probe a delay t later; stepping t films the kinetics. The delay generator's specifications become the experiment's sampling parameters directly: resolution sets the finest time step, jitter smears each sample, range sets the slowest process reachable. The working rule is ten samples per decay constant and total timing noise well under the fastest feature.

The scan itself is a remote-interface loop: channel B's delay stepped from 0 to 2 µs in 10 ns increments is 200 points; at 10 Hz with 100 shots averaged per point, one kinetic trace costs 200 × 10 s, about 33 minutes, unattended. A chopper on a spare channel at half the repetition rate gives alternating pump-on, pump-off shots for background subtraction with no extra hardware.

22Gated cameras: ICCD timing and the LIBS window

An intensified CCD is an electronic shutter: its photocathode conducts only during a gate pulse, with opening times in nanoseconds. Two pieces of arithmetic govern every gated-camera experiment, and both are duty-cycle arguments.

Background rejection first. Continuous background, room light, flame luminosity, plasma glow, integrates only while the gate is open. A 20 ns fluorescence signal captured with a 50 ns gate at 10 Hz accumulates 500 ns of open time per second of experiment; against an ungated one-second exposure, the continuous background is suppressed by 1 s / 500 ns, a factor of two million, while the pulsed signal inside the gate is untouched. Second, flash rejection: elastic scatter of the excitation pulse arrives during the pulse, fluorescence persists after it, so opening the gate just after the pulse ends trades a known fraction of signal, 1 − e−5/20, about 22 percent for a 5 ns wait on a 20 ns lifetime, for the removal of essentially all prompt scatter.

Insertion delay sets the earliest gate

Trigger the generator from a photodiode watching the laser and no gate can open sooner than the insertion delay, about 110 ns on the Model 577, after the light. For a gate that must open within nanoseconds of the pulse, the sequence must run the other way: the generator, on its internal clock, fires the laser as one channel and the gate as another, and the photodiode verifies. Section 5 derived the bound; this is the bench where it applies.

Laser-induced breakdown spectroscopy is the canonical delayed-gate application and the forgiving one. The ablation pulse ignites a plasma whose first few hundred nanoseconds emit structureless continuum; the elemental lines outlive it. The measurement lives in a window, gate delay of roughly 0.5 to 2 µs after the pulse, width of 1 to 20 µs, standard starting ranges that each matrix and laser energy shift somewhat. Stepping the gate delay in 50 ns increments while watching the line-to-background ratio finds the optimum per element in a few dozen shots; the microsecond scale of the window makes the laser's tens-of-nanoseconds build-up jitter irrelevant, which is why this recipe tolerates any triggering scheme and makes a good first bench for a new user.

00.511.52Laser pulseablation, ns-classplasma ignitesContinuumstructureless, hot plasmadecays fastLine emissionthe signaloutlives the continuumICCD gatedelay then widthopen: lines onlyTime after ablation (microseconds)Open after the continuum dies, integrate while the lines last: the gate delay is the discriminant, thewidth can be generous.Drawn at the tight end of the window: a 1 microsecond delay and about a microsecond of width.The recipe's 10 microsecond width would run past the right edge of this axis.
SchematicFigure 29. The LIBS timing argument in one drawing. The continuum and the lines both start at ablation; the continuum dies first; the gate opens in the gap. Delay is the critical number and width is forgiving, which is the exact inverse of a fluorescence-rejection gate, where the width must be tight and the delay generous. Knowing which of the two numbers is doing the work is the transferable skill of this section.

Figure 29 generalizes to every gated detector on the bench: the question is always which emission to catch and which to outwait. The channel map is the skeleton of section 19 with the camera promoted: lamp on A, Q-switch on B at 180 µs, spectrometer gate on C at 180 µs plus 1 µs with a 10 µs width, readout on D after the gate closes, and an optional early 300 ns gate on E to record the continuum itself for background modeling.

23Coincidence counting: the window arithmetic

Photon-pair optics, positron annihilation, gamma-gamma correlation and muon telescopes all reduce to the same question: two detectors click, are the clicks related? A coincidence window of half-width τ accepts pairs arriving within ±τ, and uncorrelated singles at rates R1 and R2 fake coincidences at

Racc = 2τ R1 R2
(12)

where

τ
the coincidence half-width: either click may lead by up to τ, so the full window is 2τ
R1, R2
the singles rate of each detector, in counts per second

Worked at bench rates: both detectors at 105 counts per second and τ = 10 ns give, by equation (12), 2 × 10−8 × 1010 = 200 accidental coincidences per second. Tighten τ to 1 ns and the accidentals fall to 20 per second: with a true coincidence rate of 1000 per second, the signal-to-accidentals ratio improves from 5:1 to 50:1 by changing one number, provided true pairs still land inside. That proviso is the floor: the window cannot shrink below the total timing spread of the two branches, detector responses and generator jitter in quadrature. Single-photon avalanche detectors near 100 ps each, with 50 ps of channel-to-channel generator scatter, give √(100² + 100² + 50²), about 150 ps, so windows down to a nanosecond are safe and the generator is not the limit. Fast photomultipliers at a nanosecond each dominate the budget themselves, and sub-nanosecond windows start clipping real pairs.

Gated detector bias uses the same channels twice over: biasing an avalanche detector above breakdown only in a window around expected arrival suppresses dark counts by the duty-cycle argument of section 22, a 5 ns gate at a microsecond period being a two-hundredfold suppression. And the standard accidentals measurement is itself a timing recipe: duplicate one gate on a spare channel, offset it far outside any true correlation, 100 ns is ample, and that channel counts 2τR1R2 directly, the background measured live for subtraction. This is the Model 588B's natural habitat: a detector array wants a gate per detector, path-length trims as per-channel delays, a common reference for the time-digitizer, calibration pulser lines and veto channels, and twenty-four channels on one timebase supply all of it with the 50 ps figure on every pairwise interval.

24Ground-penetrating and ultra-wideband radar: the pulse is the resolution

Impulse radar, ground-penetrating or ultra-wideband, has no carrier to speak of. The transmitter fires a single short pulse and the receiver times the echoes, so the whole performance of the system reduces to three numbers of the pulse: its width, which sets range resolution; its amplitude, which sets penetration; and its repetition rate, which sets how fast a survey can move. The 765-HV publishes all three, each with its own condition: a 1 ns minimum width, 50 Vpp into 50 Ω, and 200 MHz in single-pulse mode. The arithmetic below turns width and amplitude into the resolution and depth of a survey like Figure 30.

Illustration of a technician pushing a ground-penetrating radar cart across a bridge deck at dawn
IllustrationFigure 30. A ground-penetrating radar survey of a bridge deck. The cart's antenna fires a nanosecond-class pulse into the concrete and listens for the reflections from rebar, voids and the deck's underside; the transmitter's pulse width sets what the survey can resolve, and its amplitude sets how deep it can see.
ΔR = v τ / 2 = c τ / (2 √εr)
(13)

where

τ
the pulse width at half amplitude; two reflectors closer than vτ/2 return overlapping echoes
εr
the relative permittivity of the medium: 1 in air, about 6 for dry concrete, 4 for dry sand, 20 and more for wet clay, all practice values that vary with moisture

Worked at a 1 ns pulse, by equation (13). In air, 15 cm. In dry concrete at εr = 6 the wave slows to 0.122 m/ns and two reflectors 6.1 cm apart are separable, comfortably finer than the 15 to 30 cm at which rebar is laid in a deck. In wet clay at εr = 20 the resolution tightens to 3.4 cm, and the attenuation rises so steeply that depth, not resolution, becomes the problem. Depth is the amplitude's job. A 1 ns pulse from a −25 V baseline to +25 V, at low duty cycle through the DC block every antenna feed amounts to, is a 50 V pulse into 50 Ω: 50 W, 47 dBm, 20 dB above the 5 V swing of a standard output. Against a two-way loss of 20 dB per meter, a practice value for damp soil in this band, those 20 dB are one more meter of depth. The pulse must also reach nearly its full swing at its minimum width, which Figure 22 shows it does at 48 V; a transmitter that fires a 1 ns pulse at half its rated swing has given back the 6 dB it was bought for.

Testing the radar: four targets on one cable

A radar under test needs targets, and a range of real ones is expensive. The multi-pulse mode of section 16 makes them electrically: a Model 765 in quadruple mode injects four pulses per period into the receiver through an attenuator, each at a programmed delay from the transmit trigger, and the receiver sees four returns at four ranges. Range follows the two-way rule, R = c t/2, so the 10 ps delay step is 1.5 mm of range and the 765's published sub-10 ps RMS jitter figures are under 1.5 mm of range scatter, a hundred times finer than the 15 cm a 1 ns impulse radar resolves in air. Moving targets are a remote-interface loop stepping one delay. Figure 31 is the schedule.

020406080100Transmit pulse765-HV channel 1, 1 ns, 50 VppfireSimulated echoes765 channel 1, quadruple mode3.0 m5.25 m9.0 m12.75 mReceiver gate765 channel 2listenDigitizer trigger765 channel 3armTime after transmit (nanoseconds)Four echoes on one output at 20, 35, 60 and 85 ns are targets at 3.0, 5.25, 9.0 and 12.75 m by R = ct/2.Stepping one delay by 10 ps moves one target by 1.5 mm.
SchematicFigure 31. A radar bench with electrical targets. The HV fires the transmitter; the 765, clocked from the same 10 MHz reference, injects four echoes into the receiver at programmed delays, gates the receiver so the transmit pulse is not seen, and arms the digitizer early. The four echoes are placed by one instrument's timebase, so their mutual scatter is of the order of its published sub-10 ps channel-to-channel and width figures and is confirmed on the glass, and a 10 ps change in one register is a millimeter and a half of range.

Table 12 is the channel map behind Figure 31.

Table 12. The radar bench. The HV is the master; its trigger out drives the 765's trigger input, and both share one external clock so the echoes do not walk against the transmit pulse. The echo-to-echo intervals are four pulses placed by one timebase on one 765 output. The transmit-to-echo interval crosses an instrument boundary, and no trigger-to-pulse jitter is published for either instrument, so it is measured on wiring day with the two-channel check of section 29 and written into the timing map.
ChConnects toDelayWidthWhy
HV 1Transmit antenna or power stage, 50 Ωthe 765's trigger latency, measured1 nsThe pulse under test: 50 Vpp, 400 ps edge; its delay absorbs the time the 765 takes to answer the trigger
HV 2Transmit-inhibit or T/R switchHV 1's delay, less the switch's settling timeas neededProtects the receiver during the transmit pulse
765 1, quadReceiver input via 40 dB attenuator20, 35, 60, 85 ns1 ns eachFour targets; the attenuator sets the echo strength
765 2Receiver gate8 ns87 nsListen window after the transmit pulse clears
765 3Digitizer trigger5 ns10 nsPre-trigger so the record brackets every echo
765 4Spare: T0 marker to the scope010 nsVerifies the schedule per section 29

25Lidar and the laser-diode driver: the pulse that leaves the box as light

Time-of-flight lidar is impulse radar with a laser for an antenna, and the two-way rule is the same: range is c t/2, so a nanosecond is 15 cm, 10 ps is 1.5 mm and 1 ps is 0.15 mm. Two things are different. The transmitter is a laser diode or an electro-optic modulator, which is a current device rather than a voltage one; and the receiver is a single-photon detector or a fast photodiode whose timing is read by a time-to-digital converter that must be calibrated to the picosecond. The bench therefore wants an edge-rate instrument on the transmit side and a placement instrument on the receive side, which is the pairing of section 9 made literal, and the test bay of Figure 32 needs both.

Illustration of a vehicle in a lidar test bay with scan lines across calibration boards
IllustrationFigure 32. A vehicle lidar under test in a dark bay. The emitter fires nanosecond pulses at calibration targets and the receiver times the returns; the test bench must supply the emitter's drive pulse, the receiver's gate, and a reference return whose range is known to better than the lidar's own resolution.

Driving the emitter

A pulsed laser diode emits in proportion to the current through it above threshold, and the optical pulse's leading edge follows the current's. As a direct driver, the Model 765-HV runs from a zero baseline, because a diode cannot take the −25 V the full window would put across it, so the swing is 25 V. Into the diode plus a series resistor that makes the pair look like 50 Ω, equation (8) gives about half an ampere peak once a 2 V forward drop is taken out, with 400 ps of edge and a width from 1 ns upward. For emitters that want more current the HV drives the gate of a GaN or avalanche driver stage, and what it contributes is the edge: the driver's turn-on follows the 400 ps gate edge, and a 1 ns optical pulse needs a drive edge well inside a nanosecond or it never reaches its peak, as section 7 worked for the electrical case. An electro-optic modulator is a capacitive load and the same section's second term applies: a 10 pF modulator at 75 V/ns asks for 0.75 A during the edge, and is driven through a matched line and a series resistor, not hung on the connector.

Calibrating the receiver

The receiver's time-to-digital converter reports range in picoseconds of delay, and its calibration is a known delay. The Model 745T supplies a relative one: a reference pulse, optical through a fast emitter or electrical into the receiver's test input, stepped in 1 ps increments, which is 0.15 mm of range per step, with about 5 ps RMS of scatter below 100 ns of delay and 15 to 20 ps across the rest of a microsecond, per Figure 15. A sweep of 1,000 points at 1 ns spacing covers 150 m of range in one remote-interface loop and returns the converter's linearity against the 745T's own. That reference is bounded by its published 250 ps plus a part in ten million of the setting, 3.75 cm of range, and one target at a surveyed range sets the zero. The physical targets of a test bay then serve the optics and the absolute scale, and the electronics calibration needs neither a delay line nor a range.

020406080100120T0745T master, 100 kHzshotEmitter drive765-HV channel 1, triggered from T02 ns, 25 VReceiver gate745T channel B, 1.1 µsarmed, through the sweepReference return745T channel C, 1 ps steps6.0 mFrame sync745T channel D, 100 nsshot nTime after T0 (nanoseconds)The reference return 40 ns after the emitter fired is a target at 6.0 m; stepping channel C by 1 ps movesit 0.15 mm. The emitter's position after T0 is the HV's trigger latency, drawn here at 10 ns and measuredon wiring day.The gate opens just after the emitter fires, at a point set on wiring day, so the transmit flash is notcounted.
SchematicFigure 33. The lidar bench with the 745T as master. The HV is triggered from T0 and fires the emitter; the 745T's own channels gate the receiver, supply the stepped reference return and mark the shot for the controller. The reference-return interval is channel-to-channel on the 745T, about 5 ps RMS at short delay and 15 to 20 ps across a microsecond sweep; the emitter interval crosses the HV's trigger input, for which no trigger-to-pulse jitter is published, so it is measured on wiring day.

Table 13 is the channel map behind Figure 33.

Table 13. The lidar bench. The counted-clock pair would place channel C to 250 ps, which is 3.75 cm of range and coarser than a good automotive lidar resolves; the 745T places it to 0.15 mm. The HV's job is the emitter; the 745T's job is the ruler.
ChConnects toDelayWidthWhy
745T T0765-HV trigger in, 50 Ω, through a 6 dB attenuator0200 nsOne time zero for the bench, from the placement instrument; 5 V becomes 2.5 V, inside the input's ±3.5 V
HV 1Emitter or driver gate, 50 Ω0 from its trigger2 nsThe light; 25 V from a zero baseline into the diode network, 400 ps edge
HV 2Receiver protection or bias switch0as neededOptional; blanks the detector during the flash
745T BReceiver gatejust after the emitter fires, set on wiring day1.1 µsOpens after the flash and stays open through the calibration sweep
745T CReceiver test input or reference emitteremitter time + 40 ns, stepped100 nsThe calibrated return; 1 ps per step is 0.15 mm; the emitter time is the HV's trigger latency, measured on wiring day
745T DFrame sync to the lidar controller0100 nsMarks the shot for the controller's own bookkeeping

26Semiconductor characterization: short pulses, slow pulses, and stress

Three families of semiconductor test want a pulse rather than a DC sweep, and they want different things from it. Non-volatile memory cells are programmed by pulses whose width and amplitude set the written state, so the test is a map of width against amplitude at nanosecond resolution. Gate dielectrics trap charge on a timescale that a DC measurement averages away, so the test is a pulsed current-voltage sweep, fast enough to see the transistor before the traps fill and slow enough afterward to watch them fill. And every device has a breakdown and a latch-up threshold, so the test is a stress pulse at a known current for a known time. The first wants placement and amplitude resolution, the second wants edge rate, and the third wants amplitude and current. All three begin at the needles of Figure 34.

Illustration of a wafer under probe needles with coaxial cables
IllustrationFigure 34. A wafer on a probe station. The needles land on a single device's pads, the coaxial lines run back to the generator and the oscilloscope, and every pulse test on the wafer begins with the question section 11 asked: what impedance does the device present, and what does the pulse look like when it arrives there.

Programming a memory cell

The Model 765 datasheet's own worked example is a magnetic cell erased with a 50 ns pulse at 3.3 V and an array erased with 100 ns at 3.3 V. On the 765 both are one channel each: width in 10 ps steps, so a 50 ns pulse can be mapped in 5,000 increments, and amplitude in 4 mV steps, so the 3.3 V can be mapped in 825. A write-margin experiment is a two-dimensional loop over width and amplitude, with a readout channel following each write, and it runs unattended over the remote interface. The one trap is the one section 11 worked: a cell is not 50 Ω, so the probe line is terminated at the needle and the cell is in parallel with the termination. Without it, 3.3 V into a high-impedance probe arrives as 6.6 V, and the margin map is of the wrong device.

Pulsed current-voltage on a gate stack

A high-permittivity gate dielectric traps charge under bias, and the trapped charge shifts the threshold within microseconds. A pulsed measurement outruns it: the generator applies a gate pulse, the drain current is read through a load resistor on an oscilloscope, and the transistor is characterized in the first nanoseconds before trapping, then again hundreds of microseconds later after it. The gate pulse's edge sets how early the first measurement can be taken, and the width range sets how late the second one can be. The Model 765-HV's 400 ps edge and 1 ns to 8 s width cover both ends on one channel, with ±25 V of baseline offset to hold the gate at a bias between pulses, and its 50 V swing reaches the stress regime of the next subsection. Figure 35 is the wiring.

Model765-HV,output 150 Ω source, gatepulsePick-off teemonitors thelaunched pulse50 Ωtermination,then seriesthe line endshere; R bounds thegate currentDevice undertestgate driven,source groundedLoadresistor andbiasdrain through theload resistor tothe supplyOscilloscopechannel 1gate pulse, 50 ΩOscilloscopechannel 2drain voltage,read as currentTrigger outto scopetime zeroThe line is terminated in 50 Ω at the device; the gate hangs on that node through R, so it sees the set voltage and a bounded current.
SchematicFigure 35. Pulsed current-voltage wiring. The gate pulse is launched into a matched line, sampled at a pick-off tee for channel 1, terminated in 50 Ω at the probe, and delivered to the gate through a series resistor from the terminated node, per equation (8). Without the termination the open end of the line would double the set voltage at the gate. The drain current appears as a voltage across the load resistor on channel 2, and the generator's trigger out gives the scope its time zero. A 10 pF gate on a terminated 50 Ω node charges with a 0.25 ns time constant, so the 400 ps edge and not the 3 ns of a TTL output is the right source for the first-nanoseconds measurement.

Sizing the resistor is one line. The terminated node is a 25 Ω source, the generator's 50 Ω in parallel with the termination, so the gate sees 25 Ω plus R: its edge is set by the time constant (25 Ω + R) × C and its peak current by the set voltage over the same sum. A 10 pF gate behind R = 50 Ω charges with a 0.75 ns time constant, a 1.65 ns edge at 10 to 90 percent, and takes 25 V / 75 Ω = 0.33 A at the first instant; with R = 0 the edge is 0.55 ns and the instantaneous current 1 A. Choose R for the current the device may take, and accept the edge the product gives; a 400 ps source edge is the floor under that product, not a promise about what arrives at a capacitive gate.

Stress, and the current behind it

Transmission-line pulsing, the standard method for characterizing devices under electrostatic-discharge-class stress, applies rectangular pulses of about 100 ns at a known current and reads the voltage and current during the pulse. The Model 765-HV into 50 Ω delivers up to 0.5 A in that form directly from a zero baseline, 25 V across 50 Ω, with a 400 ps edge, which covers the lower decade of a typical stress sweep without a transmission-line charging circuit; above that, dedicated pulsers take over and the HV becomes their trigger. The arithmetic that keeps the test right is the same current equation as the gate stack: the device's own capacitance draws current during the edge, and the pick-off tee's channel 1 trace is the record of what the device received. Table 14 is the channel map for the station.

Table 14. The probe-station bench, two instruments. The HV is for the gate stack and the stress test; the 765 is for the memory map and the housekeeping; the HV's trigger out drives the 765's trigger input and both lock to one 10 MHz reference. A pre-trigger is a delay on every other channel, the same trick section 19 used: the channel that must come first is set to zero and the rest are pushed out.
ChConnects toDelayWidthWhy
HV 2Drain bias enable or second stress node0as neededFires first, so the bias is in place before the gate pulse arrives
HV 1Gate or stress node via tee, termination and series resistor100 ns1 ns to 1 sThe test pulse: amplitude, offset and edge all published into 50 Ω
765 3Oscilloscope trigger010 nsFires first, so the record includes the write pulse's edge
765 1Memory-cell write line20 ns50 ns at 3.3 VProgramming pulse; width in 10 ps steps, amplitude in 4 mV
765 2Memory-cell read line220 ns100 nsReadout after the write
765 4Prober handshakeafter the sequence1 µsSteps the wafer to the next device

27Detector front ends: emulating the particle before the beam exists

A charged particle crossing a silicon strip deposits a few femtocoulombs in under a nanosecond, and the front-end amplifier integrates and shapes that charge into a pulse tens of nanoseconds long. The particle is therefore a delta function of charge as far as the electronics are concerned, and a delta function of charge is easy to make: a voltage step into a small capacitor. The front end cannot tell the two apart, and that is what lets a detector like the one in Figure 36 be commissioned on the bench.

Illustration of a large particle detector in a hall with catwalks and cabling
IllustrationFigure 36. A detector hall. Millions of silicon-strip and pixel channels, each with a charge-sensitive front end, are commissioned on the bench long before any beam arrives, and what stands in for the particle is a pulse generator with a capacitor.
Q = Cinj × ΔV
(14)

where

Cinj
the injection capacitor, 100 fF in the example, often built into the front-end chip
ΔV
the step amplitude at the capacitor; its rise must be far faster than the shaper so the injection looks instantaneous

Worked for a minimum-ionizing particle in 300 µm of silicon, about 3.6 fC, 22,000 electrons, a practice value. By equation (14) with a 100 fF injection capacitor that is a 36 mV step. The step has two requirements the shaper imposes. Its edge must be fast against the 25 ns peaking time, so the charge arrives as a delta; and it must stay high far longer than the shaping, because the falling edge injects the same charge with the opposite sign, and a step that falls inside the shaping window cancels its own signal. A 500 ns pulse from the Model 745T does both: its edge is under 2 ns, twelve times faster than the shaper, and its fall arrives twenty peaking times after the rise. Its 2 to 5 V output through a 40 dB attenuator is 20 to 50 mV in 1 mV steps, 2 to 5 fC in 0.1 fC increments, about 600 electrons per step and 31 points from just over half a particle to 1.4 particles; a 46 dB pad moves the same window to 1 to 2.5 fC for the threshold itself. The 1 ps placement sweeps the particle across the bunch crossing.

The bunch structure, and the trigger that follows it

A collider's front end does not see isolated particles. It sees a bunch clock, 40 MHz in the common case and the bunch rate of the largest hadron collider, with hits on some crossings and a trigger accept arriving a fixed latency later. Emulating that is a period, a burst count and a delay: the 765, triggered by its own timer every 2 µs, fires a burst of forty 25 ns periods on one channel as the bunch clock and the trigger accept on another at the programmed latency, and its trigger out starts the 745T, whose channel A places the injection on a chosen crossing to 1 ps. Period and burst count are per-output settings on the 765, so the clock output runs forty periods per trigger while the accept fires once. The clock and the accept are intervals on one timebase; the 10 ps period step means the emulated clock can be detuned from 40.000 MHz in steps of 16 kHz to test the front end's phase margin; and the injection-to-clock relation crosses the 765's trigger out, which is measured on wiring day. Figure 37 is one crossing's worth.

050100150200250300Bunch clock765 channel 1, 25 ns periodnCharge injection745T channel A, 36 mV into 100 fF, 500 ns wide3.6 fC, step stays highShaper outputfront-end chip, 25 ns peakingpeaks at n + 1Trigger accept765 channel 2, latency programmedread outTime (nanoseconds)The injection lands 2 ns after crossing n so the shaper peaks in the next crossing's sampling window.Sliding the 745T's channel A in 1 ps steps maps the front end's timing acceptance.
SchematicFigure 37. One bunch crossing on the bench. The 765 supplies the clock and the trigger from one timebase, the 745T supplies the particle, and the front end under test supplies the shaped pulse. Sweeping the injection delay across the 25 ns period, in 1 ps steps, traces the front end's timing walk and its sampling window, and sweeping the attenuated amplitude in the 745T's 0.1 V steps traces its threshold curve. The two sweeps are the commissioning of a strip detector, and they need no beam.

The 745T's second job on this bench is the ruler for the time-to-digital converters that timestamp hits: a reference edge stepped in 1 ps increments across a converter's bin, as section 25 calibrated a lidar receiver, and the coincidence arithmetic of section 23 sizes the windows. And the 765-HV earns its place at the facility rather than the bench: its datasheet lists pulsed electron-beam and X-ray sources, flash radiography and high-power microwave modulators among its applications, all of them loads that need tens of volts to act and want the edge to arrive in well under a nanosecond so the facility's own jitter budget is not spent on the trigger. Table 15 is the bench channel map.

Table 15. The front-end bench, two instruments. Period and burst count are set per output on the 765: output 1 runs forty periods per trigger, outputs 2 and 3 one pulse each on the 2 µs period. Injection amplitude and timing are the two sweeps every strip and pixel chip is commissioned with: the amplitude is the 745T's 0.1 V step through 40 dB, the timing its 1 ps step; the rising edge injects positive charge and the falling edge, 500 ns later, negative, so a front end of either polarity is served by timing the accept to the right edge. The clock-to-injection relation crosses the 765's trigger out and is measured on wiring day, per section 29.
ChConnects toDelayWidthWhy
765 1Front-end bunch clock input0, burst of 40 per trigger12.5 ns at 25 ns periodThe 40 MHz crossing clock, detunable in 16 kHz steps; the 765's timer triggers a burst every 2 µs, so the burst ends with nearly a microsecond to spare
765 2Trigger accept or readout strobe250 ns25 nsLatency under test; one pulse per trigger, after the injection has landed
765 3Busy or veto to the DAQafter readout500 nsDead-time emulation
765 trigger out745T external triggerfixed10 nsStarts the 745T on every burst
745T AInjection capacitor via 40 dB, 50 Ω terminated at the chip52 ns, stepped in 1 ps500 nsThe particle: 3.6 V through 40 dB is 36 mV, 3.6 fC through 100 fF; the step outlasts the shaper
745T BTDC reference edgestepped in 1 ps100 nsBin-by-bin calibration of the timestamping

28Streak cameras, and the limit of the trigger

A streak camera converts time to space, sweeping photoelectrons across a sensor with a picosecond-class ramp. That ramp resolves time more finely than any delay generator can trigger it, so the camera is where this instrument class reaches its limit, and a bench designed around that limit works better than one designed past it. In any accumulating mode, trigger jitter shifts each sweep's start and smears the summed image; the effective resolution adds in quadrature,

σeff = √(σintrinsic² + σtrigger²)
(15)

where

σintrinsic
the camera's own resolution, single picoseconds for a good tube
σtrigger
the RMS jitter of the sweep trigger relative to the light

Worked with a 2 ps camera and 10 ps of trigger jitter: equation (15) gives √104, 10.2 ps. The trigger owns the measurement and a five times better tube would change nothing. Run backwards, the budget is severe: to degrade that 2 ps camera by no more than ten percent, the trigger may contribute √(2.2² − 2²), 0.9 ps, below the published jitter of every instrument in this handbook; the Model 745T comes closest at about 5 ps and misses by a factor of five. The workable architecture follows: the sweep trigger comes optically, a photodiode or photoconductive switch watching the actual beam feeding the camera's own sweep electronics, and the delay generator owns everything slower, lamp and Q-switch, the arm window that readies the sweep unit just before light arrives, readout, and the housekeeping of the shot. Even in single-shot work, where jitter only positions the window rather than smearing a sum, placement matters: 800 ps of external-trigger scatter on a 10 ns sweep window spends eight percent of the window on placement uncertainty, while running the arm chain from the internal clock at 50 ps spends half a percent.

The cable is part of this budget, and of every budget in Part III: signals travel about 1.5 ns per foot in solid-dielectric coax, so a forgotten meter of cable is five nanoseconds, one hundred times the channel-to-channel jitter. Section 31 tabulates the velocity factors. The working rule for wiring day: one foot of cable is a nanosecond and a half.

Part IVPractice and referenceThe bench habits, the failure modes, and the numbers, arranged to be found again rather than read once.

29Measurement practice

None of the following depends on which delay generator is on the bench, and all of it decides whether the timing is worth anything.

  1. Make the generator the master. Run the bench from the internal rate generator and drive everything as channels. Every recipe in Part III applies this rule; every interval it covers inherits the 50 ps figure instead of the 800 ps one.
  2. Terminate, or know why not. Every 50 Ω output into an unterminated line reflects; section 31 carries the arithmetic. A through terminator at the scope is the cheapest instrument on the bench.
  3. State the load with every amplitude. Write "2.0 V into 50 Ω" in the lab book, never "2 V". A termination added or removed changes a 50 Ω output's amplitude by a factor of two.
  4. Fix the cables and label their lengths. A meter of coax is five nanoseconds. A timing map that records cable lengths in nanoseconds alongside programmed delays can be rebuilt after any teardown; one that does not cannot.
  5. Trigger on the fastest clean edge available, per section 3, and set the threshold at the steepest part of that edge, mid-transition, not near its foot where slew is low and noise is amplified.
  6. Let the timebase warm up before precision work. Crystal frequency moves with temperature as the chassis comes to equilibrium; delays in the seconds range move with it, per the proportional term of equation (6).
  7. Record the whole timing state, not the two numbers you changed. Every instrument here stores complete configurations on board and dumps state over its remote interface; a saved configuration in the run log is the difference between reproducing a run and guessing at one.
  8. Verify one interval independently after wiring day. Two channels into one oscilloscope with matched cables confirms the schedule as built, catches the swapped cable and the forgotten attenuator, and takes five minutes.
  9. Measure a fast edge with a faster oscilloscope, or do not quote it. The scope's own rise time adds in quadrature, per section 7; a 1 GHz scope turns a 105 ps edge into 365 ps and a 630 ps edge into 720 ps. Section 31 tabulates what each scope class can report.
  10. Give the high-voltage output 50 ohms, always. The Model 765-HV publishes no amplitude into any other load, an unterminated line doubles the voltage at the device, and a capacitive device on the connector slows the edge by the current equation of section 7. Matched line, 50 Ω termination at the device, series resistor from that node into it, pick-off tee to watch what was launched.
  11. Attenuate before a scope input, and say so in the log. 50 V into a 50 Ω scope input exceeds most inputs' rating; a 20 dB attenuator rated for the pulse power is part of the measurement and part of the record.

30Troubleshooting

Table 16 is arranged by symptom, because a symptom is what a reader has when they open this page. The third column is the one to read first: each symptom here has two or three plausible causes, and the discriminating check separates them before any wiring is changed.

Table 16. Eighteen symptoms, each with the check that separates its causes. The first four rows resolve most first-day calls on the counted-clock pair, the last five most first-day calls on the fast-edge instruments, and every one of them is arithmetic from Parts I and II.
SymptomProbable causeThe check that discriminatesFix
No output on any channelSystem not armed, or waiting on an external trigger that never comesIs the run indicator active? Switch trigger source to internal: does it fire?Arm the system; restore the intended trigger source and verify its level
No output on one channelChannel disabled, gated off, or its output routed away by the multiplexerCheck the channel enable, the gate mode, and the MUX mask for that outputRe-enable; clear the gate; restore the default one-timer-per-output routing
Output at half the expected amplitude50 Ω termination on an output specified into high impedance, or vice versaCompare against the three-load table in section 11Match the load to the specification row, or fit the high-current option
Levels fine on a scope, downstream device never fires2.0 V terminated TTL against a threshold at or above 2.0 V, commonly 5 V CMOS at 3.15 V or moreLook up the receiver's actual input threshold in section 31Drive it with the adjustable output at a healthy margin, or the high-current TTL option
Doubled edges, staircase steps, or ringing on a long lineUnterminated 50 Ω line: the reflection returns after the edgeDoes 2 × cable delay exceed the rise time? Section 31Terminate at the far end; keep stubs short
Timing wanders by nanoseconds shot to shotTriggering across the external input from a slow or noisy edgeCompare jitter with the bench run from the internal rate generatorMake the generator the master; if it must slave, speed up the trigger edge
Fixed offset of tens to hundreds of nanoseconds appearsInsertion delay in one path and not another, or an unaccounted cableSum the published insertion delays and 5 ns/m of cable along each pathRebalance with programmed delays; document the offsets in the timing map
Delay of seconds lands visibly offThe proportional accuracy term: 10−4 × delay is 100 µs at 1 sDoes the error scale with the programmed delay?Lock to a house reference via the external clock input, per section 13
Instrument ignores triggers at high rateThe retrigger rule: triggers during an active pulse train are discardedCompute 200 ns + longest active pulse; compare the trigger periodShorten widths and delays, or accept the ceiling and decimate upstream
Pulses vanish at high rate on the rack unitThe 75 ns budget: delay + width + reset exceeds the T0 periodCheck delay + width + 75 ns against the period, channel by channelLower the rate or shorten the offending channel's schedule
Two instruments drift apart over minutesFree-running timebases: two crystals disagree by their combined ppmDoes the drift accumulate linearly with elapsed time?Clock both from one reference; coherence, not accuracy, is what is needed
Remote commands garble or dropBaud mismatch, or commands sent faster than the instrument's pacingEcho a query at the default rate; then add pacing, 10 ms on the rack unitSet the documented defaults; pace the script; prefer query-echo handshakes
Gated channel fires once more after the gate assertsPulse inhibit lets a pulse in progress finish; output inhibit truncatesScope the gate against the output: does the pulse complete or cut?Choose the inhibit flavor the experiment needs, per section 12
Fast edge reads slower than publishedThe oscilloscope's own rise time, added in quadrature; or a probe or cable ahead of the inputCompute √(tpub² + tscope²): does it match the reading? Section 31Use a scope at least three times faster than the edge; direct 50 Ω connection, no probe
High-voltage pulse at reduced amplitude, or edge visibly slowedLoad is not 50 Ω, or is capacitive; the output's current is spent in the edgeReplace the load with a 50 Ω termination at the scope: does the amplitude return?Matched line, 50 Ω termination at the device, series resistor into it, per section 26
Narrow pulse never reaches the set amplitudeWidth is of the order of the rise plus fall; the pulse is mostly edgeIs the width within about twice the published 20-to-80 edge sum? Section 7Widen the pulse, or accept the amplitude the width allows and record it
Picosecond delay steps produce no visible changeThe step is below the jitter; single shots cannot resolve itAverage: does the mean move by the step over 16 or more acquisitions?Average, or use the step for a scan whose readout averages, per section 21
Multi-pulse output rate reads half the expectedThe 400 or 800 MHz figures belong to multi-pulse modes; single-pulse mode tops out at 200 MHzWhich pulse mode is the output in?Select double, triple or quadruple mode, or external-width mode, per section 16

31Bench reference tables

The numbers a timing bench reaches for, collected. Values here are standard reference figures from manufacturer datasheets and physical constants; the instrument-specific numbers live in section 32.

Coaxial cable delay

A signal in coax travels at the velocity factor times c, so delay per length is 3.336 ns/m, or 1.017 ns/ft, divided by the velocity factor. Table 17 evaluates the families a timing bench stocks.

Table 17. Propagation delay by cable family, computed from published velocity factors. One caution the label will not give you: "RG-58" names a connector fit more than a dielectric, and foam-dielectric cables carrying the RG-58 designation run near 0.76 rather than 0.66. On a ten-foot run that is a 2 ns disagreement, forty times the channel-to-channel jitter, so measure or look up the actual cable, not the family name.
Cable familyDielectricVelocity factorDelay, ns/mDelay, ns/ft
RG-58, RG-213, RG-174 (solid PE)solid polyethylene0.665.051.54
RG-142 (PTFE)PTFE0.694.831.47
RG-8X, foam typesfoam polyethylene0.78 to 0.853.92 to 4.281.20 to 1.30
Rule of thumb: one foot of solid-dielectric coax is a nanosecond and a half; one meter is five nanoseconds.

Logic thresholds

Table 18 lists the input and output thresholds of the logic families a delay generator output drives, so a terminated 2.0 V TTL level can be checked against the receiver before the cable is connected.

Table 18. Input and output thresholds from the family datasheets, and why the half-amplitude trap of section 11 matters: 2.0 V clears some thresholds and not others. The row that causes bench calls is 5 V CMOS: its 3.15 V input-high requirement is not met by a 2.4 V TTL-grade high, and not by 2.0 V of terminated TTL, which is the failure the fourth row of the troubleshooting table diagnoses.
FamilyVIL maxVIH minVOL maxVOH min
5 V TTL and LS0.8 V2.0 V0.4 to 0.5 V2.4 V
LVTTL, 3.3 V0.8 V2.0 V0.4 V2.4 V
5 V CMOS (HC)1.35 V at VCC 4.5 V3.15 V at VCC 4.5 V0.1 V lightly loaded4.4 V lightly loaded
4000-series at 5 V1.5 V3.5 V0.05 V typical4.95 V typical
3.3 V CMOS (LVC)0.8 V2.0 V0.4 VVCC − 0.4 V
Emitter-coupled families switch near −1.3 V; their exact output levels vary by family and are not tabulated here.

Table 18 is the reference the fourth troubleshooting row of section 30 points to.

Reflections, and when termination is mandatory

Γ = (ZL − Z0) / (ZL + Z0)
(16)

where

Γ
the fraction of the incident wave reflected at the load: +1 at an open end, −1 at a short, 0 into a matched 50 Ω termination
Z0
the line impedance, 50 Ω throughout this handbook

An open end reflects at +1, so the arriving edge doubles there: a back-terminated source launches half its open-circuit swing, and the reflection restores the full swing at the open end, which is why a bare high-impedance scope input reads double the terminated value, and why the returning wave dies quietly in the matched source. The rule for when this matters is a race: terminate whenever the rise time is shorter than the round trip, twice the cable's one-way delay. Two meters of RG-58 is 10.1 ns one way, a 20.2 ns round trip, and a 2 ns edge on that line without a termination produces a doubled plateau at the far end and a 20 ns staircase at the near end, per equation (16). A 15 cm jumper with a 10 ns edge, round trip 1.5 ns, blends its reflection invisibly into the edge, which is why short unterminated stubs are tolerated for logic and never for calibrated amplitude. Connector bandwidth follows the same conservatism: the common bayonet connector is a 4 GHz part and threaded subminiature types reach 18 GHz, typical figures per manufacturer catalogs, all far above the edges of the counted-clock pair and the 745T. The 765's 105 ps edge carries 3.3 GHz and is within the bayonet connector's rating with margin; the subminiature connectors it uses carry it with a great deal more.

Oscilloscope bandwidth and the edge it can report

Table 19 applies the quadrature rule of section 7 to the three fast edges of this handbook, so a reader can tell in advance whether a given oscilloscope will measure the instrument or itself.

Table 19. Reported rise time by oscilloscope class, computed as √(edge² + (0.35/bandwidth)²) with the 10-to-90 published edges. A 2 GHz instrument reports the 765-HV within 4 percent and inflates the 765 by a factor of two; the 765 wants 8 GHz or more. The 745T's edge is readable on anything.
Scope bandwidthScope rise, 10-90745T, 2 ns edge reads765-HV, 630 ps edge reads765, 105 ps edge reads
500 MHz700 ps2.12 ns942 ps708 ps
1 GHz350 ps2.03 ns721 ps365 ps
2 GHz175 ps2.01 ns654 ps204 ps
4 GHz88 ps2.00 ns636 ps137 ps
8 GHz44 ps2.00 ns632 ps114 ps
12 GHz and above29 ps2.00 ns631 ps109 ps
The 0.35 rule assumes a Gaussian-like step response; modern flat-response scopes run nearer 0.40 to 0.45, which makes the scope-rise column slightly optimistic for them.

32Quick reference

Table 20 collects the governing relations of Part I; Table 21 collects the published values of the counted-clock pair and Table 22 those of the 745T, 765 and 765-HV. Together they are the pages to photocopy, and nothing in any of them is quotable without its condition column.

Table 20. Every governing relation in this handbook with a worked anchor beside it, so the arithmetic can be checked rather than trusted.
QuantityRelationWorked anchor
Peak-to-peak from RMStpk-pk = k × tRMSk = 6: 50 ps RMS is 300 ps pk-pk at 99.7 percent
Noise-to-jitter conversiontj = vn / (dV/dt)1 mV on 0.5 V/ns: 2 ps; on 0.02 V/ns: 50 ps
Synchronizer quantizationtRMS = Tclk/√122.89 ns at 100 MHz; 1.44 ns at 200 MHz
Delay constructiondelay = N×Tclk + vernierrange from the counter, resolution from the vernier
Delay accuracy1 ns + 10−4 × delay19 ns at 180 µs; 100 µs at 1 s
Loaded amplitudeV = Vopen ZL/(ZS+ZL)half into 50 Ω from a 50 Ω source
ReflectionΓ = (ZL−Z0)/(ZL+Z0)+1 open, −1 short, 0 matched
Termination ruleterminate when trise < 2 × cable delay2 m of RG-58: round trip 20 ns
Cable delay1.017 ns/ft divided by velocity factorRG-58: 1.54 ns/ft, 5.05 ns/m
Accidental coincidencesRacc = 2τR1R2200 per second at 10 ns and 105 singles
Velocity error, PIVδv/v = δ(Δt)/Δt50 ps on 10 µs: 5 × 10−6
Resolution under jitterσeff = √(σi² + σt²)2 ps camera + 10 ps trigger: 10.2 ps
Edge thresholdst10-90 ≈ 1.5 × t20-80400 ps becomes about 600 ps; published 630
Slew ratedV/dt = 0.6 A / t20-8050 V in 400 ps: 75 V/ns
Drive currentI = V/ZL + CL dV/dt0.5 A at a 25 V peak, a 1 A step across the window, plus 0.75 A for 10 pF at 75 V/ns
Edge bandwidthf ≈ 0.35 / t10-90105 ps: 3.3 GHz; 630 ps: 560 MHz
Measured edgetmeas = √(tsrc² + tscope²)105 ps on a 1 GHz scope: 365 ps
Radar and lidar rangeR = c t / 21 ns: 15 cm; 10 ps: 1.5 mm; 1 ps: 0.15 mm
Range resolution in a mediumΔR = c τ / (2 √εr)1 ns in concrete at 6: 6.1 cm
Injected chargeQ = Cinj ΔV100 fF and 36 mV: 3.6 fC, one minimum-ionizing particle
Table 21. Every published value of the counted-clock pair this handbook argues from, with its condition. Sources: the Model 577 datasheet and manual, the manual of the earlier Model 588 for shared-family items, and the Model 588B datasheet and manual.
QuantityModel 577Model 588BCondition
Channels4 or 812 or 24per ordering configuration
Delay, width resolution250 ps250 ps
Delay range0 to 1000 s0 to 2000 swidth 10 ns to same maximum
Delay accuracy1 ns + 0.0001×delay1 ns + 0.0001×delay
Channel-to-channel jitter< 50 ps RMS50 ps RMSoutput module tables
Trigger jitter< 800 ps RMS800 ps RMSexternal trigger input
Insertion delay< 110 ns< 160 nsexternal trigger to output
Internal rate0.001 Hz to 20 MHz0.0002 Hz to 20 MHzinternal generator
Max trigger rate5 MHz5 MHzand 1/(200 ns + longest active pulse)
Timebase100 MHz PLL, 50 ppm osc200 MHz PLL, 25 ppm osc
TTL output4.0 V into 1 kΩ; 2.0 V into 50 Ω4.0 V into 1 kΩ50 Ω output impedance; rise < 3 ns (577), 3 ns typical (588B)
Adjustable output2 to 20 V into 1 kΩ; 0.8 to 8 V into 50 Ω2 to 20 V into 1 kΩ; 1 to 10 V into 50 Ω10 mV steps
High-voltage optionAT45: 4 to 45 V, 20 mV steps, 4 channels maxnone publishednot short-circuit protected
External clock in10 to 100 MHz, discrete10 to 80 MHz, discreteclock out to 100 MHz on both
Trigger threshold0.2 to 15 V, 10 mV steps0.2 to 15 Vrising or falling
Burst counters10,000,000 per channel10,000,000 per channel; 4 × 109 systemduty cycle the same
InterfacesUSB, RS-232; Ethernet, GPIB optionalUSB, RS-232, EthernetSCPI-style command set
Storage16 configurations12 or 24 configurationsconfig 0 is the factory default
Table 22. Every published value of the placement and fast-edge instruments this handbook argues from, with its condition. Sources: the Model 745T datasheet (V11/20) and manual (NUT 083), the Model 765 datasheet (V1.22) and manual (Rev B), and the Model 765-HV datasheet (V1.3).
QuantityModel 745TModel 765Model 765-HVCondition
Channels4, plus 4 auxiliary2 or 41 or 2per ordering configuration
Placement resolution1 ps (A to D), 1.25 ns (E to H)10 ps10 psdelay; width and period likewise on the 765 family
Delay range0 to over 20 s0 to period0 to period765 period 5 ns to 8 s
Delay accuracy< 250 ps + 10−7 × delay±(0.1 percent + 100 ps)±(0.1 percent + 100 ps)
Channel-to-channel jitterabout 5 ps RMS< 10 ps RMS< 15 ps RMS745T below 100 ns delay; 765 family all channels at one frequency
Period jitternot published separately4 ps RMS15 ps RMS765 at 200 MHz, 100 Hz to 10 MHz integration
Trigger-referenced jitter25 ps + 10−7 × delay< 30 ps RMS trigger in to trigger out< 30 ps RMS trigger in to trigger out765 family: trigger input at or below 15 MHz; trigger to pulse output not published
Insertion delay< 65 ns< 100 ns to trigger out< 100 ns to trigger out
Edge, 20 to 80 percentnot published< 70 ps< 400 ps765 family into 50 Ω; HV up to 50 Vpp at zero offset
Edge, 10 to 90 percent< 2 ns max, 900 ps typical, thresholds not published< 105 ps at 5 Vpp< 630 ps rise, < 840 ps fall at 50 VppHV: < 570 and < 640 ps up to 25 Vpp
Minimum width100 ns; 5 ns with the narrow option300 ps1 nsoffset at zero
Maximum rate1 MHz200 MHz single; 800 MHz quadruple200 MHz single; 400 MHz multi-pulse and external width
Output2 to 5 V positive into 50 Ω10 mVpp to 5 Vpp, ±5 V window100 mVpp to 50 Vpp, ±25 V windowinto 50 Ω; no other load published for the HV
Amplitude resolution0.1 V1 mV below 250 mVpp, 4 mV above10 mV
Timebase0.5 ppm standard, 0.05 ppm option±2 ppm±2 ppm765 family: ±1 ppm per year aging
External clock in10 MHz; faster as an option10 to 100 MHz10 to 100 MHz765 family: 50 Ω AC-coupled, −5 to +4 dBm
InterfacesFront panel, USB to UART, Ethernet web serverTouch interface, SCPI over LAN, SDKTouch interface, SCPI over LAN, SDK
Format215 by 245 by 135 mm, under 1 kg, 50 W3U rack width, 9.7 kg, 120 W3U rack width, 9.7 kg, 300 W

33Definitions, symbols and further reading

Baseline offset
The voltage an output rests at between pulses. On the 765-HV, software-selectable at −25, −12.5, 0, +12.5 or +25 V, with a continuously adjustable DC offset on top.
Channel-to-channel jitter
The RMS scatter of the interval between two outputs of one instrument on the same shot. The synchronizer error is common to both and cancels, which is why this is the small number.
Crest factor
The multiplier k converting RMS jitter to a peak-to-peak figure at a stated exceedance probability. Peak-to-peak without k is not a specification.
Delay generator
An instrument producing multiple electrical edges at programmed delays and widths from a common trigger, all counted on one timebase.
Duty cycle mode
A channel mode firing a programmed on-count of pulses then skipping an off-count. With on = 1 and off = N − 1 it is divide-by-N.
Edge rate (rise time)
The interval between two threshold crossings on one edge, 20 to 80 percent or 10 to 90 percent of the swing; the second is about 1.5 times the first for a Gaussian-like edge. Never quoted without the thresholds, the amplitude and the load.
Gate
An input or internal signal that enables or inhibits outputs. Pulse inhibit lets the pulse in progress finish; output inhibit cuts it immediately.
Insertion delay
The time from an external trigger edge to the earliest possible output at zero programmed delay: comparator, synchronizer and driver latency summed. Internally triggered operation has none.
Multi-pulse mode
A 765-family output mode in which one output carries two, three or four pulses per period, each with its own delay and width. The route to the 400 and 800 MHz rate figures, and to four radar targets on one cable.
Multiplexer (MUX)
The OR fabric routing channel timers to output drivers, letting one output carry several timers' pulses. Timing is multiplexed; amplitude is the module's.
Placement resolution
The smallest step by which an edge's position can be set: 250 ps, 10 ps or 1 ps across this family. Independent of jitter and of edge rate; the three are the three picoseconds of section 7.
Rate generator (T0)
The internal periodic source that starts every channel's counters each cycle when the instrument is its own master.
Slew rate
The rate of change of voltage during an edge, 0.6 times the amplitude over the 20-to-80 rise time. The quantity a capacitive load converts into current demand.
Synchronizer
The flip-flop stage resampling an asynchronous trigger into the clock domain, at a cost of up to one clock period of quantization error.
Termination
A resistor matching the line impedance at the receiving end, absorbing the wave and preventing reflection. Mandatory when the rise time is shorter than the round trip.
Timebase
The crystal oscillator and PLL supplying the counting clock. Its fractional error, in ppm, multiplies every programmed delay.
Transmission-line pulse (TLP)
A rectangular stress pulse, conventionally about 100 ns, applied at a known current to characterize a device's electrostatic-discharge behavior; the standard method is ANSI/ESD STM5.5.1.
Trigger-to-output jitter
The RMS scatter of an output edge against the external trigger edge. Carries the full synchronizer residual, which is why it is the large number.
Velocity factor
The ratio of signal speed in a cable to c, set by the dielectric: 0.66 for solid polyethylene, up to 0.85 for foam.
Vernier
The analog fine-delay stage adding sub-clock-period resolution to the counted delay. Its linearity sets the fine-scale accuracy floor.
Symbols used in this document.
SymbolMeaningUnits
Tclkcounting clock periods
Nwhole clock periods counted in a delay1
tRMSRMS jitters
kcrest factor for peak-to-peak conversion1
vnRMS voltage noise at a thresholdV
dV/dtslew rate through a thresholdV/s
L(f)single-sideband phase noise, linear ratio1/Hz
ΔtPIV pulse separations
τcoincidence half-widths
Γreflection coefficient1
Z0, ZL, ZSline, load and source impedancesΩ
σeffeffective resolution under trigger jitters
Apulse amplitude into the stated loadV
t20-80, t10-90rise time between the named thresholdss
CL, Cinjload capacitance; charge injection capacitanceF
Qinjected chargeC
εrrelative permittivity of a propagation medium1
R, ΔRrange; range resolutionm
CMOS  complementary metal-oxide-semiconductor logic
DAQ  data acquisition system
ESD  electrostatic discharge
GaN  gallium nitride, the transistor family of fast laser drivers
GPIB  general purpose interface bus
HC, LS, LVC, LVTTL  logic families: high-speed CMOS, low-power Schottky TTL, low-voltage CMOS, low-voltage TTL
GPR  ground-penetrating radar
ICCD  intensified charge-coupled device camera
LAN  local area network
LED  light-emitting diode
LIBS  laser-induced breakdown spectroscopy
MIP  minimum-ionizing particle
MUX  multiplexer, the timer-to-output routing fabric
OCXO, TCXO  oven-controlled and temperature-compensated crystal oscillators
PE, PTFE  polyethylene and polytetrafluoroethylene, cable dielectrics
PIV  particle image velocimetry
PLL  phase-locked loop
ppm  parts per million, fractional frequency error
RMS  root mean square
SCPI  standard commands for programmable instruments
SDK  software development kit
SMA  the threaded subminiature coaxial connector
T0  the internal rate generator's time-zero event
T/R  transmit/receive switch
TDC  time-to-digital converter
TLP  transmission-line pulse
TTL  transistor-transistor logic levels
UART  universal asynchronous receiver-transmitter, the serial port
USB  universal serial bus
UWB  ultra-wideband

Further reading

One route onward

When a timing budget will not close, a channel count will not fit, or a value has to be confirmed before an order is placed, a Berkeley Nucleonics applications engineer can work through it with you. Bring the timing map of section 29 and the channel count the experiment needs. An hour spent on both before the order is often an hour saved on wiring day.