How a counted clock turns one trigger into an experiment, what jitter, insertion delay and edge rate cost at the bench, and the working reference for the Model 577, 588B, 745T, 765 and 765‑HV.
How a counted clock turns one trigger into an experiment, what jitter, insertion delay and edge rate cost at the bench, and the working reference for the Model 577, 588B, 745T, 765 and 765‑HV.
Every pulsed experiment is a scheduling problem: a handful of instruments must act in a fixed order, at fixed intervals, shot after shot. This handbook is about the instruments that own that schedule. Part I builds the timing physics: jitter and its references, insertion delay, the counted-clock architecture, the accuracy arithmetic and the physics of a fast edge. Part II reviews five Berkeley Nucleonics instruments against the requirements that physics derives: the Model 577 and Model 588B counted-clock Digital Delay Generators, the Model 745T with its 1 ps placement, the Model 765 with its 70 ps edge and the Model 765-HV, which swings 50 V into 50 Ω with a 400 ps edge, both 20 to 80 percent. Part III wires ten benches, from Q-switched lasers to streak cameras, with worked numbers and channel maps. Part IV is the troubleshooting table, the bench references and the quick reference.
Written for the design and test engineer: radar, lidar and semiconductor test engineers who need a fast, high-amplitude pulse with its published conditions, and integration engineers and experimental physicists building repeatable multi-channel timing. The second audience is the field engineer and technician wiring a laser, camera or detector bench, who will use Parts III and IV most.
This is a reference document, arranged in four parts that can be entered separately. Part I is the physics; section 7 names the instruments only to size its examples. Part II is the instrument review, with every published value quoted with its condition. Part III is ten applications at wiring level. Part IV is the bench material: practice, troubleshooting, reference tables, and the quick reference.
Table 1 is the router. Find the row that matches why you opened this document and start where it points.
| If you are | Start at | And you can skip |
|---|---|---|
| Learning what jitter and insertion delay are | Part I, sections 2 and 3 to 6 | Parts II and III |
| Specifying a delay generator for an experiment | Section 8, then Part II, then section 32 | Part III until wiring day |
| Choosing between five instruments that all say "delay" on the panel | Section 9, then the review chapter the table points to | The physics of Part I, until a number needs its derivation |
| Needing a fast edge, a high-voltage pulse, or picosecond placement | Section 7, then sections 16, 17 or 15 | The counted-clock chapters, sections 10 to 14 |
| Wiring a laser, camera or detector bench this week | The matching recipe in Part III, then section 30 | Part I on the first pass |
| Chasing a timing fault that appeared from nowhere | Section 30, then section 31 | Everything that is not the fault |
| Looking for a number you already understand | Sections 31 and 32 | Everything else |
A pulsed measurement is a set of instruments that must act in one fixed order at fixed intervals: pump a laser, open its cavity, gate a camera, arm a digitizer, read out. None of those devices knows about the others. Each exposes one input, a trigger edge, and does its one thing some time after that edge arrives. The whole experiment therefore reduces to a scheduling problem: produce N electrical edges with defined separations, once per shot, forever.
The improvised answer grows one box at a time. A function generator supplies the repetition rate. A coil of coax delays one line by its length. A one-shot circuit stretches a pulse for a gate. Each addition works, and the sum does not: every analog delay drifts with temperature, every added box has its own threshold and its own latency, and by the fifth device nobody can say where time zero is anymore. The limit is not any single instrument. It is the accumulation of small, separately reasonable timing decisions into a bench whose timing cannot be reproduced.
A Digital Delay Generator collapses that accumulation into one instrument: one timebase, one trigger, and many output channels, each programmed with a delay and a width. Every edge the experiment needs comes from the same counted clock, so every interval is a number in a register rather than a length of cable. The three questions that decide whether such an instrument can carry a given experiment are the subjects of the next three sections: how repeatable are its edges (jitter), how soon after a trigger can it act (insertion delay), and how true are its programmed intervals (accuracy).
Figure 1 is the reference for everything that follows. Every specification in this handbook attaches to one of its elements: jitter to the repeatability of the edges, insertion delay to the gap between the trigger and the earliest possible output, accuracy to the truth of the programmed numbers.
Jitter is the shot-to-shot wander of an edge about its ideal position. It is quoted as an RMS value, the standard deviation of the edge-time distribution, and the first thing to understand is that no instrument has one jitter. It has one jitter per pair of points you compare. The two that matter for a delay generator are trigger-to-output jitter, an external trigger edge against a delayed output edge, and channel-to-channel jitter, one output of the instrument against another on the same shot. Section 4 shows why those two differ by an order of magnitude on a counted-clock instrument, and that one difference sets the design rule the recipes of Part III lean on.
Random jitter is Gaussian and therefore unbounded: watch long enough and some edge lands arbitrarily far out. A peak-to-peak jitter figure with no population size and no probability attached is therefore meaningless. The honest conversion is a crest factor:
where
Worked once so the habit forms: an output with 50 ps RMS jitter has a 6-sigma peak-to-peak of 6 × 50 = 300 ps, and a 10−12-grade peak-to-peak of 14.1 × 50 = 705 ps. Same instrument, same physics, both numbers correct, differing only by the convention in equation (1). Quote the convention or quote nothing. Deterministic jitter, the bounded kind that comes from supply ripple, crosstalk and the quantization of section 4, adds on top linearly rather than in quadrature, because it is not Gaussian.
Every trigger input is a comparator, and a comparator converts voltage noise into timing noise at a rate set by how fast the signal crosses the threshold:
where
Worked at both extremes. A clean 2 V edge that rises in 4 ns slews at 0.5 V/ns; with 1 mV of input noise, equation (2) gives 1 mV / (0.5 V/ns) = 2 ps of jitter. The same 2 V arriving over 100 ns slews at 0.02 V/ns and the same millivolt becomes 50 ps. A 25 times slower edge costs 25 times the jitter, from nothing but the geometry of the crossing. Drive every trigger input with the fastest clean edge available: that is a physics statement, not a preference.
Jitter is not a property of the instrument alone. It is a property of a path: source slew rate, cable, comparator, clock domain and output driver together. The same delay generator shows an order of magnitude between its best-referenced and worst-referenced numbers, and a slow trigger edge can dominate everything the datasheet says. When a jitter measurement disappoints, suspect the path before the box.
Nearly every Digital Delay Generator is built the same way, and knowing the architecture is what lets a reader predict its behavior instead of memorizing it. A crystal oscillator, stable but slow, is multiplied by a phase-locked loop up to a counting frequency of order 100 MHz. Each channel is a counter that counts N whole periods of that clock, followed by an analog vernier that adds the fraction of a period the counter cannot represent:
where
The counter gives range bounded only by its width, in practice a thousand seconds and more, at crystal stability; the vernier gives resolution far below one clock period. The split explains the specification sheet: range comes from counter width, resolution from the vernier, long-delay accuracy from the crystal, and fine-scale accuracy from vernier linearity.
An external trigger is asynchronous: it arrives anywhere within a clock period with uniform probability, and the synchronizer of Figure 2 aligns it to the next clock edge. The timing error of that alignment is uniformly distributed across one period, and the RMS of a uniform distribution of width T is T/√12:
where
Worked at the two clock rates in this handbook. At 100 MHz the period is 10 ns and equation (4) gives 10 / 3.464 = 2.89 ns RMS. At 200 MHz, 5 ns and 1.44 ns RMS. A bare synchronizer, nothing else wrong, contributes nanoseconds. When an instrument publishes an external-trigger jitter below its own Tclk/√12, as the Model 577 and Model 588B of Part II do at 800 ps against bounds of 2.89 and 1.44 ns, it is telling you the trigger path measures the arrival phase within the clock period rather than merely resampling, and the published number is the residual of that finer mechanism.
Here is the fact that decides experiment architecture. Whatever error the synchronizer makes on a given shot, it makes once, before the counters start, so it moves every channel of that shot together. In the interval between channel A and channel B the synchronizer term is common mode and cancels exactly. What remains is only the differential part: vernier noise, driver threshold noise, clock distribution skew noise, tens of picoseconds. The trigger-referenced number carries the whole synchronizer residual; the channel-to-channel number carries none of it.
Put every interval that matters between two channels of one instrument, and let the external trigger position only the whole shot. An interval built as channel minus channel inherits the tens-of-picoseconds figure; the same interval built across two separately triggered devices inherits the trigger figure at both ends. The recipes of Part III lean on this rule throughout, and section 20 works the case where it is worth a factor of sixteen.
For completeness, the conversion between the frequency-domain and time-domain descriptions of a timebase, needed whenever an oscillator datasheet quotes phase noise and the experiment budget needs seconds:
where
Worked once, digit by digit, at a 100 MHz clock with phase noise flat at −120 dBc/Hz from 1 kHz to 1 MHz offset. The linear ratio is 10−12 per hertz; the band is 999,000 Hz wide; the integral is 9.99 × 10−7; doubled for both sidebands, 2.0 × 10−6; the square root is 1.41 × 10−3 radians; divided by 2π × 108 radians per second, the result is 2.25 ps RMS. The integration limits are part of the answer, and equation (5) without its limits is not a number.
Insertion delay is the time from an external trigger edge at the connector to the earliest possible output transition with the programmed delay at zero. It is the instrument's built-in latency: the comparator that turns an analog edge into a decision, the synchronizer of section 4, the counter start logic, and the output driver, summed. No programmed setting can produce an output earlier than the trigger plus this floor, and for the instruments in Part II the floor is between about 65 and 160 nanoseconds.
Internally triggered operation has no insertion delay, and it is worth being precise about why. When the instrument free-runs on its internal rate generator, time zero is created inside the clock domain: there is no comparator and no synchronizer in the path, so there is nothing to insert. The question the floor answers, how soon after an outside event can this instrument act, does not arise when the instrument itself is the source of the event.
A gate cannot open sooner after an outside flash than the insertion delay allows: about 110 ns on the Model 577, because a comparator, a synchronizer and a driver stand in the path. If the experiment needs a gate within nanoseconds of an event, the event must come from the generator, not the generator from the event. That single sentence decides the architecture of section 22.
Jitter is shot-to-shot scatter; accuracy is where the mean lands. The two are set by different hardware, the vernier and driver for jitter, the crystal for accuracy, and an experiment can need either, both, or neither. The published form of delay accuracy for the instruments in this handbook is a fixed term plus a proportional term:
where
Equation (6) rewards being evaluated at three settings, because its two terms change places. At 1 µs the bound is 1 ns + 0.1 ns, dominated by the fixed term. At 180 µs, a laser timing value section 19 uses, it is 1 ns + 18 ns = 19 ns. At 1 s it is 100 µs, one hundred thousand times the fixed term. Same instrument, same specification line, five orders of magnitude between the absolute errors, purely because the delay grew. Any experiment quoting an accuracy figure without the delay it assumes is quoting nothing.
The repair for the proportional term is a better ruler. Locking the instrument's PLL to an external reference replaces the internal crystal's error with the reference's, and two distinct benefits follow. Absolute accuracy inherits the reference: a GPS-disciplined standard at one part in 1011 shrinks that 100 µs proportional error at one second to 10 ps, leaving the 1 ns fixed term as what remains of the bound. And mutual coherence, usually worth more: every instrument locked to one reference shares the same frequency error, so inter-instrument drift cancels as common mode even when the reference itself is mediocre. Two free-running instruments at 100 ppm each can disagree by 200 ppm of any interval; locked to one house clock they track together. Section 13 covers what the instruments accept.
An edge placed to the picosecond can still arrive too slowly, too small, or carrying more current than the load can take. For radar and lidar transmitters, laser-diode drivers, semiconductor stress tests and detector front-end emulation, the shape of the edge is the measurement. Three quantities describe it, and Ohm's law and a capacitor tie them together.
A rise time is the interval between two threshold crossings on the same edge, and the thresholds are part of the specification. The 10-to-90 percent convention includes the foot and the shoulder of the edge, which are its slowest parts; the 20-to-80 percent convention excludes them. For an edge with a roughly Gaussian profile the ratio between the two is fixed, 2.563 to 1.683 standard deviations, so a 10-to-90 figure is about 1.5 times the 20-to-80 figure of the same edge. The fast instruments of Part II publish both: the Model 765 at 70 and 105 ps, the Model 765-HV at 400 and 630 ps, ratios of 1.50 and 1.58, bracketing the Gaussian 1.52. Quote the thresholds with every rise time.
where
Worked across this handbook's outputs. A TTL module publishing 0.5 V/ns is the floor. The Model 765 at 5 V in 70 ps slews, by equation (7), at 0.6 × 5 / 0.07 = 43 V/ns. The Model 765-HV at 50 V in 400 ps slews at 0.6 × 50 / 0.4 = 75 V/ns, the highest slew rate of any output in this handbook, and about five times what the Model 577's 45 V module reaches with its sub-2 ns edge, taking that figure as a 20-to-80 time. The load pays for that slew rate twice:
where
Equation (8) is why a high-voltage fast-edge output is specified into 50 Ω and nothing else, and why hanging a capacitive device directly on the connector slows the edge: the second term competes with the first for the same driver current, and an unterminated line doubles the voltage at its end on top of it. The remedy is a matched line terminated in 50 Ω at the device, with a series resistor from that node into the device, so the generator sees 50 Ω, the device sees the set voltage and not twice it, and the current into the device is bounded by the resistor. Section 26 wires it.
where
Worked at three edges. A 3 ns TTL edge, by equation (9), carries 117 MHz of content. The Model 765's 70 ps edge, about 105 ps 10 to 90, carries 3.3 GHz, and the Model 765-HV's 630 ps edge at 50 V carries 560 MHz. The same relation turns around to size the oscilloscope: a measured rise time is the quadrature sum of the source's and the scope's own, so a 1 GHz oscilloscope, with its 350 ps step response, reports the 765's 105 ps edge as √(105² + 350²) = 365 ps and has measured its own front end. To report a 70 ps edge within ten percent the scope must contribute no more than √(77² − 70²) = 32 ps between the same thresholds, about 49 ps at 10 to 90, which by the same relation is a 7 GHz instrument. The 765-HV captures in Part II were taken on a wide-band oscilloscope sampling at 40 GS/s, and section 31 tabulates the scope classes.
A narrow pulse is two edges with a short agreement between them. Take the Model 765-HV at its 1 ns minimum width with its published 400 ps rise and 530 ps fall, both 20 to 80 percent. From the 50 percent crossing to the 80 percent level is half the rise, 200 ps; from 80 percent back down to 50 percent is half the fall, 265 ps; so of a 1000 ps pulse measured at half amplitude, about 1000 − 200 − 265 = 535 ps spends above 80 percent of the swing. Half the pulse is edge. Narrow the width much further and the pulse stops reaching full amplitude at all, so 1 ns is the floor of that instrument and 300 ps, with 70 ps edges, is the floor of the Model 765. A minimum width is not a timing limit; it is an edge-rate limit wearing a different unit.
The curve of Figure 3 is a model rather than a capture, so section 17 sets a measured 1 ns pulse beside it. Model and measurement agree on the feature a width budget depends on: a rounded top a few percent short of the full swing, 7 percent in the model and 4 in the capture.
A picosecond specification can describe three independent things, and a buyer who confuses them pays for the wrong one. Placement resolution is the finest step by which an edge may be moved: 250 ps on the Model 577 and 588B, 10 ps on the Model 765 and 765-HV, 1 ps on the Model 745T. Jitter is how far the edge wanders from where it was placed: section 3. Edge rate is how fast the transition happens once it starts. The three are set by different hardware and come in any combination: the 745T places to 1 ps with an edge under 2 ns, the 765 places to 10 ps with an edge of 70 ps, and the 577 places to 250 ps with an edge under 3 ns.
Before comparing instruments, write down which of the three the experiment needs. A pump-probe fine axis needs placement. A coincidence window needs jitter. A laser-diode driver or a radar transmitter needs edge rate. An experiment needing two of the three is the common case and the chapters of Part III say which two.
Part I turned into a checklist. Table 2 states what the physics demands of any delay or pulse generator asked to carry a pulsed experiment, each requirement traceable to a section rather than to a brochure. Part II reviews five instruments against it, and a reader can score any vendor with the same nine rows.
| # | Requirement | Derived from |
|---|---|---|
| R1 | Channel-to-channel jitter specified, in RMS, tens of picoseconds, because that is the number every internal interval inherits | Sections 3, 4 |
| R2 | Trigger-referenced jitter specified separately, and larger | Section 4 |
| R3 | Insertion delay published, so the earliest-gate arithmetic can be done before wiring day | Section 5 |
| R4 | An internal rate generator good enough to be the master clock of the bench | Sections 4, 5 |
| R5 | Delay accuracy in the fixed-plus-proportional form, with resolution far finer than any interval being set | Section 6 |
| R6 | External clock input and output, for house-reference lock and multi-unit coherence | Section 6 |
| R7 | Enough independent channels, with per-channel modes, gating and routing, that one timebase can carry the whole experiment | Sections 2, 4 |
| R8 | Edge rate published with its thresholds, its amplitude and its load, and a minimum width consistent with it | Section 7 |
| R9 | Amplitude and offset window published into a stated load, so the current the output must source is known before the device is connected | Section 7 |
Berkeley Nucleonics builds five instruments that a buyer searching for a delay generator will meet, and they are not five sizes of one thing. Two of them, the Model 577 and Model 588B, are counted-clock Digital Delay Generators in the sense of Figure 2: many channels, long ranges, 250 ps placement, 50 ps channel-to-channel jitter, and on the 577 output modules up to 45 V. The Model 745T is a Digital Delay Generator built for placement: four channels at 1 ps resolution over 20 seconds, with about 5 ps of jitter at short delay. The Model 765 and Model 765-HV are fast-edge pulse generators that also delay: 70 ps and 400 ps edges, 20 to 80 percent, 10 ps placement, and amplitudes of 5 V and 50 V into 50 Ω. Section 7 named the three picoseconds; Table 3 shows which instrument is built for each.
| Model 577 | Model 588B | Model 745T | Model 765 | Model 765-HV | |
|---|---|---|---|---|---|
| Built for | Benchtop sequencing | Rack sequencing | Picosecond placement | Fast edges | Fast edges at 50 V |
| Channels | 4 or 8 | 12 or 24 | 4, plus 4 auxiliary | 2 or 4 | 1 or 2 |
| Placement resolution | 250 ps | 250 ps | 1 ps (A to D) | 10 ps | 10 ps |
| Delay range | 0 to 1000 s | 0 to 2000 s | 0 to over 20 s | 0 to one period; period up to 8 s | 0 to one period; period up to 8 s |
| Channel-to-channel jitter | < 50 ps RMS | 50 ps RMS | about 5 ps RMS below 100 ns delay | < 10 ps RMS | < 15 ps RMS |
| Edge | < 3 ns, 10 to 90 (TTL) | 3 ns typical, 10 to 90 (TTL) | < 2 ns, thresholds not published | < 70 ps, 20 to 80 | < 400 ps, 20 to 80, to 50 Vpp |
| Minimum width | 10 ns | 10 ns | 100 ns | 300 ps | 1 ns |
| Output into 50 Ω | 2 V TTL; 0.8 to 8 V adjustable; 45 V module | 2 V TTL; 1 to 10 V adjustable | 2 to 5 V, positive | 10 mVpp to 5 Vpp, ±5 V window | 100 mVpp to 50 Vpp, ±25 V window |
| Maximum rate | 20 MHz internal, 5 MHz triggered | 20 MHz internal, 5 MHz triggered | 1 MHz | 200 MHz single pulse, 800 MHz quad | 200 MHz single pulse, 400 MHz multi-pulse |
| Review | Sections 10 to 14 | Sections 10 to 14 | Section 15 | Section 16 | Section 17 |
The Model 577 is the benchtop: four or eight independent channels behind a display and keypad, made to be driven by hand at a laser table and by script overnight. The Model 588B is the rack system: twelve or twenty-four channels in a 2U chassis, with front-panel status LEDs and no local display, made to be installed once and driven entirely by remote interface. The two share the programming model of Figure 1, 250 ps setting resolution, and the accuracy form of equation (6), so one review serves both.
Table 4 is the published pair at a glance; the engine and I/O detail follows in sections 10 to 13.
| Model 577 | Model 588B | |
|---|---|---|
| Channels | 4 (577-4C) or 8 (577-8C) | 12 (588B-12C) or 24 (588B-24C) |
| Format | Benchtop, 10.5 × 8.25 × 5.5 in, 8 lb, color display and keypad | Rack mount, 19 × 10 × 3.50 in (2U) at twelve or twenty-four channels, 8 lb, LED status, no display |
| Delay and width resolution | 250 ps | 250 ps |
| Delay range | 0 to 1000 s | 0 to 2000 s |
| Width range | 10 ns to 1000 s | 10 ns to 2000 s |
| Internal rate | 0.001 Hz to 20.000 MHz | 0.0002 Hz to 20.000 MHz |
| Timebase | 100 MHz low-jitter PLL, 50 MHz 50 ppm crystal | 200 MHz low-jitter PLL, 50 MHz 25 ppm crystal |
| Interfaces | USB and RS-232 standard; Ethernet and GPIB optional | USB, RS-232 and Ethernet, all standard |
The choice between the two, Figure 4 and Figure 5, usually turns on who, or what, drives the instrument. The 577 is the right instrument when a person stands at the bench: the display makes delay scanning and troubleshooting immediate. The 588B is the right instrument when channel count or facility integration rules: twenty-four channels on one timebase means twenty-four intervals that all enjoy the channel-to-channel number of section 4, with no interval forced across an instrument boundary.
Table 5 is the timing specification both models publish, arranged by the requirement each row answers. Every value carries its reference and its source.
| Quantity | Model 577 | Model 588B | Answers |
|---|---|---|---|
| Channel-to-channel jitter | < 50 ps RMS | 50 ps RMS (output module tables) | R1 |
| Internal rate (T0) jitter | < 50 ps RMS | < 50 ps RMS | R4 |
| External trigger jitter | < 800 ps RMS | 800 ps RMS | R2 |
| Trigger insertion delay | < 110 ns | < 160 ns | R3 |
| Delay accuracy | 1 ns + 0.0001 × delay | 1 ns + 0.0001 × delay | R5 |
| Resolution, delay and width | 250 ps | 250 ps | R5 |
| Max external trigger rate | 1/(200 ns + longest active pulse), 5 MHz ceiling | 1/(200 ns + longest active pulse), 5 MHz ceiling | R2 |
Two of those rows repay a second look. The 800 ps trigger figure against the 2.89 ns bare-synchronizer bound of equation (4) at 100 MHz says the trigger path resolves arrival phase within the clock period, as section 4 predicted. And the 16:1 ratio between the trigger and channel figures is the measured form of the common-mode cancellation argument: both instruments deliver roughly the same channel-to-channel performance despite different clock rates, because the differential noise of vernier and drivers, not the clock, is what remains after the synchronizer term cancels.
Behind Figure 6 is the retrigger rule both instruments enforce: the system ignores incoming triggers until every channel has completed its programmed pulse. The manual's own worked example is exact: with 100 µs widths and a 50 µs delay, no trigger can be honored faster than every 150 µs, about 6.7 kHz, however far below the 5 MHz ceiling that is. The 588B adds a stated budget: delay plus width plus 75 ns of hardware reset must fit inside the T0 period, or pulses are dropped.
Every amplitude specification in this section names its load, because the load is half the number. The physics is one voltage divider: a source of impedance ZS driving a load ZL delivers
where
The Model 577 manual's own output table is the worked example, and it is reproduced exactly because the load is half of every amplitude number. Table 6 adds the third load the other documents publish and the divider arithmetic of equation (10) beside each row.
| Load | Published TTL level | The divider says |
|---|---|---|
| High impedance | 4.0 V typical | the full open-circuit swing |
| 1 kΩ | 4.0 V typical | 1000/1050 = 0.95 of the swing, printed as 4.0 V |
| 50 Ω | 2.0 V typical | 50/100 = exactly half: 4.0 V becomes 2.0 V |
| Adjustable mode on the same module is published at 2.0 to 20 VDC into 1 kΩ and 0.8 to 8.0 VDC into 50 Ω against a 75 Ω source impedance, and 50/(50+75) = 0.4 reproduces the second range from the first, reading the published 1 kΩ figures as the open-circuit swing they approximate at 1000/1075 = 0.93 of it. The datasheet's older 1 to 10 V into 50 Ω lineage implies a 50 Ω source. The 0.8 to 8.0 V pair is the range to design against. | ||
The module options answer the traps the standard output leaves open. The TZ50 high-current option holds at least 4 V of TTL drive into a 50 Ω load, for terminated lines that must still clear CMOS thresholds. The AT35 and AT45 options raise the ceiling for Pockels cell drivers and other stiff loads: the AT45 delivers 4 to 45 V in 20 mV steps, with published rise times below 2 ns into low impedance and below 9 ns into high impedance, a 150 V total-amplitude budget across the system, no short-circuit protection, and a stated limit of four channels. Optical output and input modules (820 and 1300 nm, ST fiber) carry triggers across kilovolt-potential gaps, at a price the datasheet states plainly: the optical input adds its own insertion delay below 300 ns and jitter below 1.4 ns RMS. Every one of those numbers is a published module specification, quoted with its condition, and the AT45's amplitude floor is the corrected table value, 4 V, not the 5 V its own datasheet prose once said.
Channel count only matters if the channels can be shaped and combined. Three mechanisms do the shaping on both instruments; the oscilloscope captures in this section are from the Model 588B manual, evidence rather than illustration, and the mechanisms they record are common to both instruments.
Ahead of each output driver is an OR fabric. On the Model 577, any or all channel timers may be OR'd onto any output, an 8-bit mask per output; on the Model 588B, up to five timers may be routed to each output. Only timing is multiplexed, not amplitude: the output level is the output module's. The fabric turns channel timers into an instruction set, and the two captures below, Figure 7 and Figure 8, are its two canonical programs.
Both instruments accept a gate input that can enable or inhibit output, globally or per channel, active high or active low. The two inhibit flavors differ in one respect a laser bench cares about: pulse inhibit lets a pulse in progress finish and blocks the next one, while output inhibit cuts the output immediately. The Model 588B adds channel-timer gating, GATA as a global gate, GATB as a bank gate and INHB as a bank inhibit, so one timer channel can gate a group of others with no external wiring at all. Figure 9 is the behavior on the glass.
Figure 10 includes the mode that quietly replaces a rack of dividers. Duty cycle with an on-count of 1 and an off-count of N − 1 fires every Nth pulse, which is the divide-by-N function of older pulse generators as a special case; the manual of the earlier Model 588, the 588B's predecessor, states the equivalence in those terms. A photodiode watching an 80 MHz oscillator, a channel dividing by 80,000, and the experiment runs at 1 kHz in lockstep with the laser's own clock. Burst counters reach 10,000,000 per channel on both models, and 4,000,000,000 at system level on the 588B; wait counts let a channel hold off for a programmed number of periods before joining.
Two referencing features complete the set. A channel may take another channel, rather than T0, as its sync source, so a chain of events can be programmed as relative offsets that survive retuning of the head of the chain, and the 577 documentation describes referencing one channel against another in positive or negative time, its negative-delay feature. Circular chains are refused by the firmware. The instruments' own captures of independent per-channel rates and of negative delay are reproduced in the datasheet set; the negative-delay capture shows one channel firing ahead of the reference channel's edge, which is only possible because everything is programmed against the same future T0.
R6 asks that the instrument accept the house ruler and offer its own. Both comply, differently enough to matter. The Model 577 accepts an external clock from 10 to 100 MHz in discrete steps and can emit T0 or a reference output over the same range. The Model 588B accepts a discrete list, 10, 20, 25, 30, 40, 50, 60 or 80 MHz, and emits T0 or 10 to 100 MHz; its manual's preliminary appendix mentions electrical acceptance to 100 MHz, but 80 MHz is the top of every published selectable list, so 80 MHz is the number to design against. The earlier Model 588, which the 588B replaces, documents its clock input's sensitivity separately: 50 mV to 2.5 V peak, minimum pulse width 100 ps, insertion delay of the clock path at most 10 ns, a specification written for one use, the photodiode watching a modelocked laser.
Figure 11 and Figure 12 together are the coherence argument of section 6 made concrete: lock the generator to the oscillator and the 6 ns bound of Figure 12 is met with room to spare, because a clock-locked window counts the oscillator's own periods and tracks the train by construction. The Model 588B manual's external-clock appendix publishes 300 ps cycle-to-cycle and 1 ns period jitter for that path, both preliminary. No equivalent measurement exists for the Model 577, so its margin belongs on the wiring-day checklist of section 29 before an experiment depends on it. Trigger the picker from an unlocked box instead and the 800 ps trigger figure plus drift eats the margin.
Both instruments speak the same command family over their serial paths: SCPI-style ASCII, with every front-panel function reachable as a command. The Model 577 carries USB and RS-232 as standard with Ethernet and GPIB as a factory communications option; the Model 588B carries USB, RS-232 and Ethernet as standard, and since it has no front panel display, the remote path is not an option but the instrument's face. A supplied Windows control application exposes every 588B channel, the system modes and a command terminal, and requires no installation. Configuration storage is on board: 16 named setups on the 577, one per channel count on the 588B, 12 or 24, with a factory-default configuration zero that cannot be overwritten. For scripted work the practical numbers are the defaults: 115200 baud on RS-232, 38400 on the 588B's USB port, and a stated 10 ms command pacing at full rate on the 588B.
Use the front panel, on the 577, for bring-up and troubleshooting: a delay scan with a knob finds an optimum faster than an edit-compile loop. Use the remote interface for anything repeated: a pump-probe scan of two hundred delay points is a for-loop, and section 21 budgets one. Use stored configurations for the handoff between them, so the state a human tuned is the state the script recalls.
Moving an edge in 1 ps steps takes a different architecture from moving it in 250 ps steps, and the Model 745T is built around that difference. Four high-resolution channels, A to D, set delay in 1 ps steps from zero to more than 20 seconds; four auxiliary channels, E to H, are an option at 1.25 ns resolution for the housekeeping edges. The 1 ps step is 250 times finer than the counted-clock pair, and the architecture that buys it is visible in Figure 14: a delay reference block ahead of the high-resolution channels, which is the vernier of section 4 promoted to the center of the design, and a timebase whose stability is specified in parts per ten million rather than parts per hundred thousand.
Table 7 gives the published timing engine of the instrument in Figure 13, with a condition on every row. Note the resolution row: 1 ps is the front-panel step, and the remote interface accepts finer settings.
| Quantity | Model 745T | Condition |
|---|---|---|
| Channels | 4 high-resolution (A to D); 4 auxiliary (E to H) optional | 745T-4C and 745T-8C |
| Delay resolution | 1 ps on A to D; 1.25 ns on E to H | front-panel step; the remote interface accepts finer settings |
| Delay range | 0 to more than 20 s | |
| Jitter, short delay | about 5 ps RMS | delay below 100 ns, internal or external trigger, typical |
| Jitter, long delay | 25 ps + delay × 10−7 RMS | external trigger to any output |
| Delay accuracy | < 250 ps + delay × 10−7 | A to D |
| Timebase | 0.5 ppm TCXO standard; 0.05 ppm OCXO option | |
| Insertion delay | < 65 ns | external trigger to output |
| Output, A to D | 2 to 5 V into 50 Ω, positive only; width 100 ns to 10 µs in 5 ns steps | rise under 2 ns maximum, 900 ps typical, thresholds not published |
| Maximum rate | 1 MHz | external repetitive or internal timers |
| Trigger input | 0.1 to 5 V threshold into 50 Ω, either slope, prescaler to 65,535 | |
| Clock | 10 MHz in, 10 or 100 MHz out, ±1 V into 50 Ω | a faster reference input is a factory option |
| Interfaces | Front panel, USB to UART, Ethernet with embedded web server | 4 stored setups; board-level 745-OEM variant |
Set against the family table, the 745T's 5 ps places an edge ten times more repeatably than the 577 or 588B. Its 1 ps step is also finer than its own scatter, and that is the useful order: average enough shots and the scan resolves its own step. What the instrument gives up is in the output row of the table. Two to five volts, positive only, 100 ns minimum width, 1 MHz maximum rate: these are trigger edges for other instruments, not drive for a load. The 745T is the master clock of a picosecond bench, and sections 25 and 27 pair it with a fast-edge generator for that reason.
Against the counted-clock pair, the 745T adds two tools to a laser bench, Figure 16 and Figure 17: a pair of outputs whose width is a difference of picosecond delays, and a picking window placed to 1 ps against the oscillator's own period. Section 13 gave the stability bound for picking, 6 ns on an 80 MHz train; the 745T's margin against it is three orders of magnitude.
The Model 765 is a pulse generator first and a delay generator second, and the order matters. Its two or four outputs are 50 Ω sources with an analog edge converter behind each one, and the published edge is under 70 ps between 20 and 80 percent at 5 V peak-to-peak into 50 Ω, under 105 ps between 10 and 90. By equation (9) that is a 3.3 GHz signal, nearly thirty times the bandwidth of a TTL delay-generator output, and by equation (7) a slew of 43 V/ns. Every timing parameter (delay, width and period) is set in 10 ps steps, so the instrument also places edges 25 times finer than the counted-clock pair, over a shorter range: a delay on the 765 spans from zero to one period, and the period can be anything from 5 ns to 8 s.
Behind the touch interface of Figure 18 is the instrument's own control application, running on an embedded Windows platform; remote control is SCPI over a LAN connection, with a free software development kit for the usual languages. Table 8 is the published timing and output specification, every row into 50 Ω.
| Quantity | Model 765 | Condition |
|---|---|---|
| Channels | 2 or 4 | 765-2C, 765-4C |
| Amplitude | 10 mVpp to 5 Vpp | into 50 Ω; any window within −5 to +5 V, offset ±2.5 V |
| Amplitude resolution | 1 mV below 250 mVpp; 4 mV above | into 50 Ω |
| Edge, 20 to 80 percent | < 70 ps | rise and fall, into 50 Ω |
| Edge, 10 to 90 percent | < 95 ps at 1 Vpp; < 105 ps at 5 Vpp | into 50 Ω |
| Overshoot | < 5 percent | |
| Width | 300 ps to period minus 300 ps | 10 ps steps; offset at zero |
| Period | 5 ns to 8 s | 10 ps steps |
| Rate | 200 MHz single pulse; 400, 600, 800 MHz in double, triple, quadruple mode | multi-pulse modes OR several timers onto one output |
| Delay | 0 to period | 10 ps steps, ±(0.1 percent + 100 ps) |
| Period jitter | 4 ps RMS | 200 MHz output, 100 Hz to 10 MHz integration, all channels at one frequency, single pulse, continuous |
| Channel-to-channel jitter | < 10 ps RMS | same condition |
| Width jitter | < 10 ps RMS | same condition |
| Trigger in to trigger out | < 30 ps RMS; delay < 100 ns | trigger input at or below 15 MHz |
| Trigger input | 50 Ω or 1 kΩ; ±8 V threshold in 10 mV steps; 40 MHz; 1 ns minimum | prescaler to 65,535 per channel |
| External width input | to 1 GHz | output follows the input width |
| Timebase | ±2 ppm; clock in 10 to 100 MHz; clock out 10 MHz or the input frequency | ±1 ppm per year aging |
| Format | 3U, 19 inch rack width, 445 by 135 by 320 mm, 9.7 kg, 120 W | rack kit optional |
The feature that turns a two-channel instrument into a pattern source is the multi-pulse mode. Each output can carry one, two, three or four pulses per period, each with its own delay and width, and the whole group repeats at the period. In effect, one connector carries a four-pulse pattern; Figure 19 gives the timing and Figure 20 a capture.
The 800 MHz on the datasheet cover comes from this mode. Four pulses per 5 ns period on one output is an 800 MHz pulse train, and in external-width mode the output will follow an input to 1 GHz; a single pulse per period reaches 200 MHz. Quote the mode with the rate, as an amplitude is quoted with its load.
The Model 765-HV is the Model 765's architecture built for amplitude. One or two outputs swing up to 50 V peak-to-peak into 50 Ω, anywhere within a window of −25 to +25 V, with a rise under 400 ps between 20 and 80 percent at the full 50 V and offset at zero. Run through section 7, those figures become 75 V/ns of slew, a 1 A step in load current, 0.5 A and 12.5 W at the 25 V peak, and a 10 pF load adding another three quarters of an ampere during the edge. The instrument draws 300 W from the line to do it. It is the only output in the family built to drive a load rather than signal one, and the radar, lidar and semiconductor chapters of Part III depend on it.
Table 9 specifies the two-channel instrument of Figure 21: every amplitude into 50 Ω and every edge with its threshold pair, because on this instrument the two conventions differ by 230 ps.
| Quantity | Model 765-HV | Condition |
|---|---|---|
| Channels | 1 or 2 | 765-HV-1C, 765-HV-2C |
| Amplitude | 100 mVpp to 50 Vpp | into 50 Ω; no high-impedance figure is published |
| Window | −25 to +25 V | DC offset ±25 V adjustable; baseline at −25, −12.5, 0, +12.5 or +25 V |
| Rise, 20 to 80 percent | < 400 ps | up to 50 Vpp, offset at zero |
| Rise, 10 to 90 percent | < 570 ps to 25 Vpp; < 630 ps to 50 Vpp | offset at zero |
| Fall, 20 to 80 percent | < 430 ps to 25 Vpp; < 530 ps to 50 Vpp | offset at zero |
| Fall, 10 to 90 percent | < 640 ps to 25 Vpp; < 840 ps to 50 Vpp | |
| Overshoot | < 8 percent to 25 Vpp; < 5 percent from 25 to 50 Vpp | |
| Width | 1 ns to period minus 1 ns | 10 ps steps; offset at zero |
| Period | 5 ns to 8 s | 10 ps steps |
| Rate | 200 MHz single pulse; 400 MHz double, triple, quadruple; 400 MHz external width | external width at 50 percent duty |
| Delay | 0 to period | 10 ps steps, ±(0.1 percent + 100 ps) |
| Period jitter | 15 ps RMS | all channels at one frequency, single pulse, continuous |
| Channel-to-channel jitter | < 15 ps RMS | same condition |
| Width jitter | < 10 ps RMS | same condition |
| Trigger in to trigger out | < 30 ps RMS; delay < 100 ns | trigger input at or below 15 MHz |
| Trigger input, timebase, clock | as the Model 765 | section 16 |
| Format | 3U, 19 inch rack width, 9.7 kg, 300 W |
Four captures of a Model 765-HV follow, all taken on a 40 GS/s oscilloscope into 50 Ω, each with its on-screen measurement table reproduced. Each was chosen so that it can be checked against a row of the specification table above.
Read the four captures as one argument. Figure 22 is the width floor at full amplitude; Figure 23 is the edge inside its limits with margin; Figure 24 is the rate ceiling at that width and nearly that amplitude; Figure 25 is two of everything at once. Figure 26 then places the instrument in the family: not the finest placement and not the fastest edge, but the highest slew rate, 75 V/ns against the 765's 43 V/ns.
Any load that needs tens of volts to do anything and needs them to arrive in well under a nanosecond: a laser-diode or electro-optic driver, a radar or ground-penetrating transmitter, a semiconductor stress or short-pulse test, a Pockels cell or photomultiplier gate, a high-power microwave modulator trigger that wants a real edge. For a logic-level trigger edge the Model 745T or 577 is the right instrument and the HV's 300 W buys nothing.
Every instrument in the family has boundaries set by its physics, and a bench designed past one of them fails on wiring day. The boundaries below carry numbers and sources, as the specifications do, and Part III routes around each one where a route exists.
Most of Part III is variations on one skeleton, so it is built once, here, on the commonest pulsed laser in the laboratory. A flashlamp-pumped, Q-switched Nd:YAG stores pump energy in its upper laser level, whose fluorescence lifetime is about 230 µs. While the cavity is held closed, the lamp pumps population in and spontaneous decay drains it out, so the stored inversion rises, peaks and falls. Opening the Q-switch at the peak dumps the maximum energy into one nanosecond-class pulse; opening off-peak yields less. The flashlamp-to-Q-switch delay is therefore not merely a setting, it is the laser's pulse-energy control, and it touches no optics.
The arithmetic that makes the knob quantitative: waiting an extra 50 µs past the optimum loses roughly 1 − e−50/230, about 20 percent, of the stored inversion to spontaneous decay; an extra 23 µs costs about 10 percent. A delay swept from 100 to 250 µs in 1 µs steps maps the whole energy curve in 150 shots, and against that sweep the instrument's contribution is invisible: at a 180 µs setting the accuracy bound of equation (6) is 19 ns, fifty times finer than the step, and the shot-to-shot scatter is 50 ps, more than four orders below the step.
Table 10 is the channel map, the format every following recipe reuses. The photodiode row carries the laser's own contribution: the electrical schedule is exact to picoseconds, but the laser adds its own tens-of-nanoseconds build-up jitter on top, so downstream picosecond work re-references to measured light, per Figure 27.
| Ch | Connects to | Delay | Width | Why |
|---|---|---|---|---|
| A | Flashlamp driver trigger | 0 | 10 µs | Starts the pump; the lamp supply shapes the current, the edge only starts it |
| B | Q-switch (Pockels cell) driver | 180 µs, tuned 100 to 250 µs | 100 ns | Opens the cavity at peak inversion; this delay is the energy knob |
| C | Camera or experiment gate | 180.1 µs | as needed | Coarse sync; carries the laser's build-up jitter, see the photodiode row |
| D | Digitizer trigger | 179.9 µs | 1 µs | Pre-trigger so the acquisition window brackets the light |
| PD | Photodiode on a pick-off, to any ps-critical input | n/a | n/a | Re-references downstream timing to actual photon arrival |
PIV measures a flow by photographing seeded particles twice, a known interval Δt apart, and correlating the two frames: velocity is displacement over Δt. The relative velocity error therefore contains the relative timing error directly,
where
Sizing first: at 20 µm per pixel and a 10 m/s flow, a 5 pixel target displacement is 100 µm, so Δt = 10 µs. Now equation (11) prices the architecture. Both Q-switch channels on one instrument's internal clock: 50 ps on 10 µs is 5 × 10−6, three orders below the correlation error of about one percent, invisible. The same two edges built across the external trigger path instead: 800 ps gives 8 × 10−5, sixteen times worse, still survivable at this Δt. But fast flows shrink Δt: at 100 ns the external-trigger figure is 0.8 percent of the measurement, as large as the correlation error itself, while the channel-to-channel figure is still only 0.05 percent. The design rule of Part III is worth a factor of sixteen here, and the factor lands exactly where the measurement is hardest.
Figure 28 places the pulses; Table 11 shows why a dual-cavity PIV system uses four laser channels rather than two. Each head keeps its own flashlamp-to-Q-switch delay, its energy knob from section 19, while Δt is set by sliding head 2's pair together. Energy balance and pulse separation stay independent, which is what makes the system tunable in the field.
| Ch | Connects to | Delay | Width | Why |
|---|---|---|---|---|
| A | Laser 1 flashlamp | 0 | 10 µs | Pump head 1 |
| B | Laser 1 Q-switch | 180 µs | 100 ns | Pulse 1; the A-to-B interval is head 1's energy knob |
| C | Laser 2 flashlamp | Δt = 10 µs | 10 µs | Pump head 2, shifted whole |
| D | Laser 2 Q-switch | 180 µs + Δt | 100 ns | Pulse 2, exactly Δt after pulse 1; C-to-D stays head 2's energy knob |
| E | Camera frame trigger | 175 µs | per camera | Places the frame boundary between the two pulses |
The field evidence behind Table 11 is the Berkeley Nucleonics PIV technical note, the published record of this wiring in working installations: the four-signal dual-laser architecture is its recommended hookup, the direct dependence of velocity on Δt is its central caution, and the channel map above compresses its guidance into one table. The practical consequence it documents is operational: a facility that changes flow regime retunes two delay numbers and touches no optics, which is why this wiring survives operator handoffs that would break an optically trimmed bench.
Time-resolved spectroscopy launches a process with a pump pulse and samples it with a probe a delay t later; stepping t films the kinetics. The delay generator's specifications become the experiment's sampling parameters directly: resolution sets the finest time step, jitter smears each sample, range sets the slowest process reachable. The working rule is ten samples per decay constant and total timing noise well under the fastest feature.
The scan itself is a remote-interface loop: channel B's delay stepped from 0 to 2 µs in 10 ns increments is 200 points; at 10 Hz with 100 shots averaged per point, one kinetic trace costs 200 × 10 s, about 33 minutes, unattended. A chopper on a spare channel at half the repetition rate gives alternating pump-on, pump-off shots for background subtraction with no extra hardware.
An intensified CCD is an electronic shutter: its photocathode conducts only during a gate pulse, with opening times in nanoseconds. Two pieces of arithmetic govern every gated-camera experiment, and both are duty-cycle arguments.
Background rejection first. Continuous background, room light, flame luminosity, plasma glow, integrates only while the gate is open. A 20 ns fluorescence signal captured with a 50 ns gate at 10 Hz accumulates 500 ns of open time per second of experiment; against an ungated one-second exposure, the continuous background is suppressed by 1 s / 500 ns, a factor of two million, while the pulsed signal inside the gate is untouched. Second, flash rejection: elastic scatter of the excitation pulse arrives during the pulse, fluorescence persists after it, so opening the gate just after the pulse ends trades a known fraction of signal, 1 − e−5/20, about 22 percent for a 5 ns wait on a 20 ns lifetime, for the removal of essentially all prompt scatter.
Trigger the generator from a photodiode watching the laser and no gate can open sooner than the insertion delay, about 110 ns on the Model 577, after the light. For a gate that must open within nanoseconds of the pulse, the sequence must run the other way: the generator, on its internal clock, fires the laser as one channel and the gate as another, and the photodiode verifies. Section 5 derived the bound; this is the bench where it applies.
Laser-induced breakdown spectroscopy is the canonical delayed-gate application and the forgiving one. The ablation pulse ignites a plasma whose first few hundred nanoseconds emit structureless continuum; the elemental lines outlive it. The measurement lives in a window, gate delay of roughly 0.5 to 2 µs after the pulse, width of 1 to 20 µs, standard starting ranges that each matrix and laser energy shift somewhat. Stepping the gate delay in 50 ns increments while watching the line-to-background ratio finds the optimum per element in a few dozen shots; the microsecond scale of the window makes the laser's tens-of-nanoseconds build-up jitter irrelevant, which is why this recipe tolerates any triggering scheme and makes a good first bench for a new user.
Figure 29 generalizes to every gated detector on the bench: the question is always which emission to catch and which to outwait. The channel map is the skeleton of section 19 with the camera promoted: lamp on A, Q-switch on B at 180 µs, spectrometer gate on C at 180 µs plus 1 µs with a 10 µs width, readout on D after the gate closes, and an optional early 300 ns gate on E to record the continuum itself for background modeling.
Photon-pair optics, positron annihilation, gamma-gamma correlation and muon telescopes all reduce to the same question: two detectors click, are the clicks related? A coincidence window of half-width τ accepts pairs arriving within ±τ, and uncorrelated singles at rates R1 and R2 fake coincidences at
where
Worked at bench rates: both detectors at 105 counts per second and τ = 10 ns give, by equation (12), 2 × 10−8 × 1010 = 200 accidental coincidences per second. Tighten τ to 1 ns and the accidentals fall to 20 per second: with a true coincidence rate of 1000 per second, the signal-to-accidentals ratio improves from 5:1 to 50:1 by changing one number, provided true pairs still land inside. That proviso is the floor: the window cannot shrink below the total timing spread of the two branches, detector responses and generator jitter in quadrature. Single-photon avalanche detectors near 100 ps each, with 50 ps of channel-to-channel generator scatter, give √(100² + 100² + 50²), about 150 ps, so windows down to a nanosecond are safe and the generator is not the limit. Fast photomultipliers at a nanosecond each dominate the budget themselves, and sub-nanosecond windows start clipping real pairs.
Gated detector bias uses the same channels twice over: biasing an avalanche detector above breakdown only in a window around expected arrival suppresses dark counts by the duty-cycle argument of section 22, a 5 ns gate at a microsecond period being a two-hundredfold suppression. And the standard accidentals measurement is itself a timing recipe: duplicate one gate on a spare channel, offset it far outside any true correlation, 100 ns is ample, and that channel counts 2τR1R2 directly, the background measured live for subtraction. This is the Model 588B's natural habitat: a detector array wants a gate per detector, path-length trims as per-channel delays, a common reference for the time-digitizer, calibration pulser lines and veto channels, and twenty-four channels on one timebase supply all of it with the 50 ps figure on every pairwise interval.
Impulse radar, ground-penetrating or ultra-wideband, has no carrier to speak of. The transmitter fires a single short pulse and the receiver times the echoes, so the whole performance of the system reduces to three numbers of the pulse: its width, which sets range resolution; its amplitude, which sets penetration; and its repetition rate, which sets how fast a survey can move. The 765-HV publishes all three, each with its own condition: a 1 ns minimum width, 50 Vpp into 50 Ω, and 200 MHz in single-pulse mode. The arithmetic below turns width and amplitude into the resolution and depth of a survey like Figure 30.
where
Worked at a 1 ns pulse, by equation (13). In air, 15 cm. In dry concrete at εr = 6 the wave slows to 0.122 m/ns and two reflectors 6.1 cm apart are separable, comfortably finer than the 15 to 30 cm at which rebar is laid in a deck. In wet clay at εr = 20 the resolution tightens to 3.4 cm, and the attenuation rises so steeply that depth, not resolution, becomes the problem. Depth is the amplitude's job. A 1 ns pulse from a −25 V baseline to +25 V, at low duty cycle through the DC block every antenna feed amounts to, is a 50 V pulse into 50 Ω: 50 W, 47 dBm, 20 dB above the 5 V swing of a standard output. Against a two-way loss of 20 dB per meter, a practice value for damp soil in this band, those 20 dB are one more meter of depth. The pulse must also reach nearly its full swing at its minimum width, which Figure 22 shows it does at 48 V; a transmitter that fires a 1 ns pulse at half its rated swing has given back the 6 dB it was bought for.
A radar under test needs targets, and a range of real ones is expensive. The multi-pulse mode of section 16 makes them electrically: a Model 765 in quadruple mode injects four pulses per period into the receiver through an attenuator, each at a programmed delay from the transmit trigger, and the receiver sees four returns at four ranges. Range follows the two-way rule, R = c t/2, so the 10 ps delay step is 1.5 mm of range and the 765's published sub-10 ps RMS jitter figures are under 1.5 mm of range scatter, a hundred times finer than the 15 cm a 1 ns impulse radar resolves in air. Moving targets are a remote-interface loop stepping one delay. Figure 31 is the schedule.
Table 12 is the channel map behind Figure 31.
| Ch | Connects to | Delay | Width | Why |
|---|---|---|---|---|
| HV 1 | Transmit antenna or power stage, 50 Ω | the 765's trigger latency, measured | 1 ns | The pulse under test: 50 Vpp, 400 ps edge; its delay absorbs the time the 765 takes to answer the trigger |
| HV 2 | Transmit-inhibit or T/R switch | HV 1's delay, less the switch's settling time | as needed | Protects the receiver during the transmit pulse |
| 765 1, quad | Receiver input via 40 dB attenuator | 20, 35, 60, 85 ns | 1 ns each | Four targets; the attenuator sets the echo strength |
| 765 2 | Receiver gate | 8 ns | 87 ns | Listen window after the transmit pulse clears |
| 765 3 | Digitizer trigger | 5 ns | 10 ns | Pre-trigger so the record brackets every echo |
| 765 4 | Spare: T0 marker to the scope | 0 | 10 ns | Verifies the schedule per section 29 |
Time-of-flight lidar is impulse radar with a laser for an antenna, and the two-way rule is the same: range is c t/2, so a nanosecond is 15 cm, 10 ps is 1.5 mm and 1 ps is 0.15 mm. Two things are different. The transmitter is a laser diode or an electro-optic modulator, which is a current device rather than a voltage one; and the receiver is a single-photon detector or a fast photodiode whose timing is read by a time-to-digital converter that must be calibrated to the picosecond. The bench therefore wants an edge-rate instrument on the transmit side and a placement instrument on the receive side, which is the pairing of section 9 made literal, and the test bay of Figure 32 needs both.
A pulsed laser diode emits in proportion to the current through it above threshold, and the optical pulse's leading edge follows the current's. As a direct driver, the Model 765-HV runs from a zero baseline, because a diode cannot take the −25 V the full window would put across it, so the swing is 25 V. Into the diode plus a series resistor that makes the pair look like 50 Ω, equation (8) gives about half an ampere peak once a 2 V forward drop is taken out, with 400 ps of edge and a width from 1 ns upward. For emitters that want more current the HV drives the gate of a GaN or avalanche driver stage, and what it contributes is the edge: the driver's turn-on follows the 400 ps gate edge, and a 1 ns optical pulse needs a drive edge well inside a nanosecond or it never reaches its peak, as section 7 worked for the electrical case. An electro-optic modulator is a capacitive load and the same section's second term applies: a 10 pF modulator at 75 V/ns asks for 0.75 A during the edge, and is driven through a matched line and a series resistor, not hung on the connector.
The receiver's time-to-digital converter reports range in picoseconds of delay, and its calibration is a known delay. The Model 745T supplies a relative one: a reference pulse, optical through a fast emitter or electrical into the receiver's test input, stepped in 1 ps increments, which is 0.15 mm of range per step, with about 5 ps RMS of scatter below 100 ns of delay and 15 to 20 ps across the rest of a microsecond, per Figure 15. A sweep of 1,000 points at 1 ns spacing covers 150 m of range in one remote-interface loop and returns the converter's linearity against the 745T's own. That reference is bounded by its published 250 ps plus a part in ten million of the setting, 3.75 cm of range, and one target at a surveyed range sets the zero. The physical targets of a test bay then serve the optics and the absolute scale, and the electronics calibration needs neither a delay line nor a range.
Table 13 is the channel map behind Figure 33.
| Ch | Connects to | Delay | Width | Why |
|---|---|---|---|---|
| 745T T0 | 765-HV trigger in, 50 Ω, through a 6 dB attenuator | 0 | 200 ns | One time zero for the bench, from the placement instrument; 5 V becomes 2.5 V, inside the input's ±3.5 V |
| HV 1 | Emitter or driver gate, 50 Ω | 0 from its trigger | 2 ns | The light; 25 V from a zero baseline into the diode network, 400 ps edge |
| HV 2 | Receiver protection or bias switch | 0 | as needed | Optional; blanks the detector during the flash |
| 745T B | Receiver gate | just after the emitter fires, set on wiring day | 1.1 µs | Opens after the flash and stays open through the calibration sweep |
| 745T C | Receiver test input or reference emitter | emitter time + 40 ns, stepped | 100 ns | The calibrated return; 1 ps per step is 0.15 mm; the emitter time is the HV's trigger latency, measured on wiring day |
| 745T D | Frame sync to the lidar controller | 0 | 100 ns | Marks the shot for the controller's own bookkeeping |
Three families of semiconductor test want a pulse rather than a DC sweep, and they want different things from it. Non-volatile memory cells are programmed by pulses whose width and amplitude set the written state, so the test is a map of width against amplitude at nanosecond resolution. Gate dielectrics trap charge on a timescale that a DC measurement averages away, so the test is a pulsed current-voltage sweep, fast enough to see the transistor before the traps fill and slow enough afterward to watch them fill. And every device has a breakdown and a latch-up threshold, so the test is a stress pulse at a known current for a known time. The first wants placement and amplitude resolution, the second wants edge rate, and the third wants amplitude and current. All three begin at the needles of Figure 34.
The Model 765 datasheet's own worked example is a magnetic cell erased with a 50 ns pulse at 3.3 V and an array erased with 100 ns at 3.3 V. On the 765 both are one channel each: width in 10 ps steps, so a 50 ns pulse can be mapped in 5,000 increments, and amplitude in 4 mV steps, so the 3.3 V can be mapped in 825. A write-margin experiment is a two-dimensional loop over width and amplitude, with a readout channel following each write, and it runs unattended over the remote interface. The one trap is the one section 11 worked: a cell is not 50 Ω, so the probe line is terminated at the needle and the cell is in parallel with the termination. Without it, 3.3 V into a high-impedance probe arrives as 6.6 V, and the margin map is of the wrong device.
A high-permittivity gate dielectric traps charge under bias, and the trapped charge shifts the threshold within microseconds. A pulsed measurement outruns it: the generator applies a gate pulse, the drain current is read through a load resistor on an oscilloscope, and the transistor is characterized in the first nanoseconds before trapping, then again hundreds of microseconds later after it. The gate pulse's edge sets how early the first measurement can be taken, and the width range sets how late the second one can be. The Model 765-HV's 400 ps edge and 1 ns to 8 s width cover both ends on one channel, with ±25 V of baseline offset to hold the gate at a bias between pulses, and its 50 V swing reaches the stress regime of the next subsection. Figure 35 is the wiring.
Sizing the resistor is one line. The terminated node is a 25 Ω source, the generator's 50 Ω in parallel with the termination, so the gate sees 25 Ω plus R: its edge is set by the time constant (25 Ω + R) × C and its peak current by the set voltage over the same sum. A 10 pF gate behind R = 50 Ω charges with a 0.75 ns time constant, a 1.65 ns edge at 10 to 90 percent, and takes 25 V / 75 Ω = 0.33 A at the first instant; with R = 0 the edge is 0.55 ns and the instantaneous current 1 A. Choose R for the current the device may take, and accept the edge the product gives; a 400 ps source edge is the floor under that product, not a promise about what arrives at a capacitive gate.
Transmission-line pulsing, the standard method for characterizing devices under electrostatic-discharge-class stress, applies rectangular pulses of about 100 ns at a known current and reads the voltage and current during the pulse. The Model 765-HV into 50 Ω delivers up to 0.5 A in that form directly from a zero baseline, 25 V across 50 Ω, with a 400 ps edge, which covers the lower decade of a typical stress sweep without a transmission-line charging circuit; above that, dedicated pulsers take over and the HV becomes their trigger. The arithmetic that keeps the test right is the same current equation as the gate stack: the device's own capacitance draws current during the edge, and the pick-off tee's channel 1 trace is the record of what the device received. Table 14 is the channel map for the station.
| Ch | Connects to | Delay | Width | Why |
|---|---|---|---|---|
| HV 2 | Drain bias enable or second stress node | 0 | as needed | Fires first, so the bias is in place before the gate pulse arrives |
| HV 1 | Gate or stress node via tee, termination and series resistor | 100 ns | 1 ns to 1 s | The test pulse: amplitude, offset and edge all published into 50 Ω |
| 765 3 | Oscilloscope trigger | 0 | 10 ns | Fires first, so the record includes the write pulse's edge |
| 765 1 | Memory-cell write line | 20 ns | 50 ns at 3.3 V | Programming pulse; width in 10 ps steps, amplitude in 4 mV |
| 765 2 | Memory-cell read line | 220 ns | 100 ns | Readout after the write |
| 765 4 | Prober handshake | after the sequence | 1 µs | Steps the wafer to the next device |
A charged particle crossing a silicon strip deposits a few femtocoulombs in under a nanosecond, and the front-end amplifier integrates and shapes that charge into a pulse tens of nanoseconds long. The particle is therefore a delta function of charge as far as the electronics are concerned, and a delta function of charge is easy to make: a voltage step into a small capacitor. The front end cannot tell the two apart, and that is what lets a detector like the one in Figure 36 be commissioned on the bench.
where
Worked for a minimum-ionizing particle in 300 µm of silicon, about 3.6 fC, 22,000 electrons, a practice value. By equation (14) with a 100 fF injection capacitor that is a 36 mV step. The step has two requirements the shaper imposes. Its edge must be fast against the 25 ns peaking time, so the charge arrives as a delta; and it must stay high far longer than the shaping, because the falling edge injects the same charge with the opposite sign, and a step that falls inside the shaping window cancels its own signal. A 500 ns pulse from the Model 745T does both: its edge is under 2 ns, twelve times faster than the shaper, and its fall arrives twenty peaking times after the rise. Its 2 to 5 V output through a 40 dB attenuator is 20 to 50 mV in 1 mV steps, 2 to 5 fC in 0.1 fC increments, about 600 electrons per step and 31 points from just over half a particle to 1.4 particles; a 46 dB pad moves the same window to 1 to 2.5 fC for the threshold itself. The 1 ps placement sweeps the particle across the bunch crossing.
A collider's front end does not see isolated particles. It sees a bunch clock, 40 MHz in the common case and the bunch rate of the largest hadron collider, with hits on some crossings and a trigger accept arriving a fixed latency later. Emulating that is a period, a burst count and a delay: the 765, triggered by its own timer every 2 µs, fires a burst of forty 25 ns periods on one channel as the bunch clock and the trigger accept on another at the programmed latency, and its trigger out starts the 745T, whose channel A places the injection on a chosen crossing to 1 ps. Period and burst count are per-output settings on the 765, so the clock output runs forty periods per trigger while the accept fires once. The clock and the accept are intervals on one timebase; the 10 ps period step means the emulated clock can be detuned from 40.000 MHz in steps of 16 kHz to test the front end's phase margin; and the injection-to-clock relation crosses the 765's trigger out, which is measured on wiring day. Figure 37 is one crossing's worth.
The 745T's second job on this bench is the ruler for the time-to-digital converters that timestamp hits: a reference edge stepped in 1 ps increments across a converter's bin, as section 25 calibrated a lidar receiver, and the coincidence arithmetic of section 23 sizes the windows. And the 765-HV earns its place at the facility rather than the bench: its datasheet lists pulsed electron-beam and X-ray sources, flash radiography and high-power microwave modulators among its applications, all of them loads that need tens of volts to act and want the edge to arrive in well under a nanosecond so the facility's own jitter budget is not spent on the trigger. Table 15 is the bench channel map.
| Ch | Connects to | Delay | Width | Why |
|---|---|---|---|---|
| 765 1 | Front-end bunch clock input | 0, burst of 40 per trigger | 12.5 ns at 25 ns period | The 40 MHz crossing clock, detunable in 16 kHz steps; the 765's timer triggers a burst every 2 µs, so the burst ends with nearly a microsecond to spare |
| 765 2 | Trigger accept or readout strobe | 250 ns | 25 ns | Latency under test; one pulse per trigger, after the injection has landed |
| 765 3 | Busy or veto to the DAQ | after readout | 500 ns | Dead-time emulation |
| 765 trigger out | 745T external trigger | fixed | 10 ns | Starts the 745T on every burst |
| 745T A | Injection capacitor via 40 dB, 50 Ω terminated at the chip | 52 ns, stepped in 1 ps | 500 ns | The particle: 3.6 V through 40 dB is 36 mV, 3.6 fC through 100 fF; the step outlasts the shaper |
| 745T B | TDC reference edge | stepped in 1 ps | 100 ns | Bin-by-bin calibration of the timestamping |
A streak camera converts time to space, sweeping photoelectrons across a sensor with a picosecond-class ramp. That ramp resolves time more finely than any delay generator can trigger it, so the camera is where this instrument class reaches its limit, and a bench designed around that limit works better than one designed past it. In any accumulating mode, trigger jitter shifts each sweep's start and smears the summed image; the effective resolution adds in quadrature,
where
Worked with a 2 ps camera and 10 ps of trigger jitter: equation (15) gives √104, 10.2 ps. The trigger owns the measurement and a five times better tube would change nothing. Run backwards, the budget is severe: to degrade that 2 ps camera by no more than ten percent, the trigger may contribute √(2.2² − 2²), 0.9 ps, below the published jitter of every instrument in this handbook; the Model 745T comes closest at about 5 ps and misses by a factor of five. The workable architecture follows: the sweep trigger comes optically, a photodiode or photoconductive switch watching the actual beam feeding the camera's own sweep electronics, and the delay generator owns everything slower, lamp and Q-switch, the arm window that readies the sweep unit just before light arrives, readout, and the housekeeping of the shot. Even in single-shot work, where jitter only positions the window rather than smearing a sum, placement matters: 800 ps of external-trigger scatter on a 10 ns sweep window spends eight percent of the window on placement uncertainty, while running the arm chain from the internal clock at 50 ps spends half a percent.
The cable is part of this budget, and of every budget in Part III: signals travel about 1.5 ns per foot in solid-dielectric coax, so a forgotten meter of cable is five nanoseconds, one hundred times the channel-to-channel jitter. Section 31 tabulates the velocity factors. The working rule for wiring day: one foot of cable is a nanosecond and a half.
None of the following depends on which delay generator is on the bench, and all of it decides whether the timing is worth anything.
Table 16 is arranged by symptom, because a symptom is what a reader has when they open this page. The third column is the one to read first: each symptom here has two or three plausible causes, and the discriminating check separates them before any wiring is changed.
| Symptom | Probable cause | The check that discriminates | Fix |
|---|---|---|---|
| No output on any channel | System not armed, or waiting on an external trigger that never comes | Is the run indicator active? Switch trigger source to internal: does it fire? | Arm the system; restore the intended trigger source and verify its level |
| No output on one channel | Channel disabled, gated off, or its output routed away by the multiplexer | Check the channel enable, the gate mode, and the MUX mask for that output | Re-enable; clear the gate; restore the default one-timer-per-output routing |
| Output at half the expected amplitude | 50 Ω termination on an output specified into high impedance, or vice versa | Compare against the three-load table in section 11 | Match the load to the specification row, or fit the high-current option |
| Levels fine on a scope, downstream device never fires | 2.0 V terminated TTL against a threshold at or above 2.0 V, commonly 5 V CMOS at 3.15 V or more | Look up the receiver's actual input threshold in section 31 | Drive it with the adjustable output at a healthy margin, or the high-current TTL option |
| Doubled edges, staircase steps, or ringing on a long line | Unterminated 50 Ω line: the reflection returns after the edge | Does 2 × cable delay exceed the rise time? Section 31 | Terminate at the far end; keep stubs short |
| Timing wanders by nanoseconds shot to shot | Triggering across the external input from a slow or noisy edge | Compare jitter with the bench run from the internal rate generator | Make the generator the master; if it must slave, speed up the trigger edge |
| Fixed offset of tens to hundreds of nanoseconds appears | Insertion delay in one path and not another, or an unaccounted cable | Sum the published insertion delays and 5 ns/m of cable along each path | Rebalance with programmed delays; document the offsets in the timing map |
| Delay of seconds lands visibly off | The proportional accuracy term: 10−4 × delay is 100 µs at 1 s | Does the error scale with the programmed delay? | Lock to a house reference via the external clock input, per section 13 |
| Instrument ignores triggers at high rate | The retrigger rule: triggers during an active pulse train are discarded | Compute 200 ns + longest active pulse; compare the trigger period | Shorten widths and delays, or accept the ceiling and decimate upstream |
| Pulses vanish at high rate on the rack unit | The 75 ns budget: delay + width + reset exceeds the T0 period | Check delay + width + 75 ns against the period, channel by channel | Lower the rate or shorten the offending channel's schedule |
| Two instruments drift apart over minutes | Free-running timebases: two crystals disagree by their combined ppm | Does the drift accumulate linearly with elapsed time? | Clock both from one reference; coherence, not accuracy, is what is needed |
| Remote commands garble or drop | Baud mismatch, or commands sent faster than the instrument's pacing | Echo a query at the default rate; then add pacing, 10 ms on the rack unit | Set the documented defaults; pace the script; prefer query-echo handshakes |
| Gated channel fires once more after the gate asserts | Pulse inhibit lets a pulse in progress finish; output inhibit truncates | Scope the gate against the output: does the pulse complete or cut? | Choose the inhibit flavor the experiment needs, per section 12 |
| Fast edge reads slower than published | The oscilloscope's own rise time, added in quadrature; or a probe or cable ahead of the input | Compute √(tpub² + tscope²): does it match the reading? Section 31 | Use a scope at least three times faster than the edge; direct 50 Ω connection, no probe |
| High-voltage pulse at reduced amplitude, or edge visibly slowed | Load is not 50 Ω, or is capacitive; the output's current is spent in the edge | Replace the load with a 50 Ω termination at the scope: does the amplitude return? | Matched line, 50 Ω termination at the device, series resistor into it, per section 26 |
| Narrow pulse never reaches the set amplitude | Width is of the order of the rise plus fall; the pulse is mostly edge | Is the width within about twice the published 20-to-80 edge sum? Section 7 | Widen the pulse, or accept the amplitude the width allows and record it |
| Picosecond delay steps produce no visible change | The step is below the jitter; single shots cannot resolve it | Average: does the mean move by the step over 16 or more acquisitions? | Average, or use the step for a scan whose readout averages, per section 21 |
| Multi-pulse output rate reads half the expected | The 400 or 800 MHz figures belong to multi-pulse modes; single-pulse mode tops out at 200 MHz | Which pulse mode is the output in? | Select double, triple or quadruple mode, or external-width mode, per section 16 |
The numbers a timing bench reaches for, collected. Values here are standard reference figures from manufacturer datasheets and physical constants; the instrument-specific numbers live in section 32.
A signal in coax travels at the velocity factor times c, so delay per length is 3.336 ns/m, or 1.017 ns/ft, divided by the velocity factor. Table 17 evaluates the families a timing bench stocks.
| Cable family | Dielectric | Velocity factor | Delay, ns/m | Delay, ns/ft |
|---|---|---|---|---|
| RG-58, RG-213, RG-174 (solid PE) | solid polyethylene | 0.66 | 5.05 | 1.54 |
| RG-142 (PTFE) | PTFE | 0.69 | 4.83 | 1.47 |
| RG-8X, foam types | foam polyethylene | 0.78 to 0.85 | 3.92 to 4.28 | 1.20 to 1.30 |
| Rule of thumb: one foot of solid-dielectric coax is a nanosecond and a half; one meter is five nanoseconds. | ||||
Table 18 lists the input and output thresholds of the logic families a delay generator output drives, so a terminated 2.0 V TTL level can be checked against the receiver before the cable is connected.
| Family | VIL max | VIH min | VOL max | VOH min |
|---|---|---|---|---|
| 5 V TTL and LS | 0.8 V | 2.0 V | 0.4 to 0.5 V | 2.4 V |
| LVTTL, 3.3 V | 0.8 V | 2.0 V | 0.4 V | 2.4 V |
| 5 V CMOS (HC) | 1.35 V at VCC 4.5 V | 3.15 V at VCC 4.5 V | 0.1 V lightly loaded | 4.4 V lightly loaded |
| 4000-series at 5 V | 1.5 V | 3.5 V | 0.05 V typical | 4.95 V typical |
| 3.3 V CMOS (LVC) | 0.8 V | 2.0 V | 0.4 V | VCC − 0.4 V |
| Emitter-coupled families switch near −1.3 V; their exact output levels vary by family and are not tabulated here. | ||||
Table 18 is the reference the fourth troubleshooting row of section 30 points to.
where
An open end reflects at +1, so the arriving edge doubles there: a back-terminated source launches half its open-circuit swing, and the reflection restores the full swing at the open end, which is why a bare high-impedance scope input reads double the terminated value, and why the returning wave dies quietly in the matched source. The rule for when this matters is a race: terminate whenever the rise time is shorter than the round trip, twice the cable's one-way delay. Two meters of RG-58 is 10.1 ns one way, a 20.2 ns round trip, and a 2 ns edge on that line without a termination produces a doubled plateau at the far end and a 20 ns staircase at the near end, per equation (16). A 15 cm jumper with a 10 ns edge, round trip 1.5 ns, blends its reflection invisibly into the edge, which is why short unterminated stubs are tolerated for logic and never for calibrated amplitude. Connector bandwidth follows the same conservatism: the common bayonet connector is a 4 GHz part and threaded subminiature types reach 18 GHz, typical figures per manufacturer catalogs, all far above the edges of the counted-clock pair and the 745T. The 765's 105 ps edge carries 3.3 GHz and is within the bayonet connector's rating with margin; the subminiature connectors it uses carry it with a great deal more.
Table 19 applies the quadrature rule of section 7 to the three fast edges of this handbook, so a reader can tell in advance whether a given oscilloscope will measure the instrument or itself.
| Scope bandwidth | Scope rise, 10-90 | 745T, 2 ns edge reads | 765-HV, 630 ps edge reads | 765, 105 ps edge reads |
|---|---|---|---|---|
| 500 MHz | 700 ps | 2.12 ns | 942 ps | 708 ps |
| 1 GHz | 350 ps | 2.03 ns | 721 ps | 365 ps |
| 2 GHz | 175 ps | 2.01 ns | 654 ps | 204 ps |
| 4 GHz | 88 ps | 2.00 ns | 636 ps | 137 ps |
| 8 GHz | 44 ps | 2.00 ns | 632 ps | 114 ps |
| 12 GHz and above | 29 ps | 2.00 ns | 631 ps | 109 ps |
| The 0.35 rule assumes a Gaussian-like step response; modern flat-response scopes run nearer 0.40 to 0.45, which makes the scope-rise column slightly optimistic for them. | ||||
Table 20 collects the governing relations of Part I; Table 21 collects the published values of the counted-clock pair and Table 22 those of the 745T, 765 and 765-HV. Together they are the pages to photocopy, and nothing in any of them is quotable without its condition column.
| Quantity | Relation | Worked anchor |
|---|---|---|
| Peak-to-peak from RMS | tpk-pk = k × tRMS | k = 6: 50 ps RMS is 300 ps pk-pk at 99.7 percent |
| Noise-to-jitter conversion | tj = vn / (dV/dt) | 1 mV on 0.5 V/ns: 2 ps; on 0.02 V/ns: 50 ps |
| Synchronizer quantization | tRMS = Tclk/√12 | 2.89 ns at 100 MHz; 1.44 ns at 200 MHz |
| Delay construction | delay = N×Tclk + vernier | range from the counter, resolution from the vernier |
| Delay accuracy | 1 ns + 10−4 × delay | 19 ns at 180 µs; 100 µs at 1 s |
| Loaded amplitude | V = Vopen ZL/(ZS+ZL) | half into 50 Ω from a 50 Ω source |
| Reflection | Γ = (ZL−Z0)/(ZL+Z0) | +1 open, −1 short, 0 matched |
| Termination rule | terminate when trise < 2 × cable delay | 2 m of RG-58: round trip 20 ns |
| Cable delay | 1.017 ns/ft divided by velocity factor | RG-58: 1.54 ns/ft, 5.05 ns/m |
| Accidental coincidences | Racc = 2τR1R2 | 200 per second at 10 ns and 105 singles |
| Velocity error, PIV | δv/v = δ(Δt)/Δt | 50 ps on 10 µs: 5 × 10−6 |
| Resolution under jitter | σeff = √(σi² + σt²) | 2 ps camera + 10 ps trigger: 10.2 ps |
| Edge thresholds | t10-90 ≈ 1.5 × t20-80 | 400 ps becomes about 600 ps; published 630 |
| Slew rate | dV/dt = 0.6 A / t20-80 | 50 V in 400 ps: 75 V/ns |
| Drive current | I = V/ZL + CL dV/dt | 0.5 A at a 25 V peak, a 1 A step across the window, plus 0.75 A for 10 pF at 75 V/ns |
| Edge bandwidth | f ≈ 0.35 / t10-90 | 105 ps: 3.3 GHz; 630 ps: 560 MHz |
| Measured edge | tmeas = √(tsrc² + tscope²) | 105 ps on a 1 GHz scope: 365 ps |
| Radar and lidar range | R = c t / 2 | 1 ns: 15 cm; 10 ps: 1.5 mm; 1 ps: 0.15 mm |
| Range resolution in a medium | ΔR = c τ / (2 √εr) | 1 ns in concrete at 6: 6.1 cm |
| Injected charge | Q = Cinj ΔV | 100 fF and 36 mV: 3.6 fC, one minimum-ionizing particle |
| Quantity | Model 577 | Model 588B | Condition |
|---|---|---|---|
| Channels | 4 or 8 | 12 or 24 | per ordering configuration |
| Delay, width resolution | 250 ps | 250 ps | |
| Delay range | 0 to 1000 s | 0 to 2000 s | width 10 ns to same maximum |
| Delay accuracy | 1 ns + 0.0001×delay | 1 ns + 0.0001×delay | |
| Channel-to-channel jitter | < 50 ps RMS | 50 ps RMS | output module tables |
| Trigger jitter | < 800 ps RMS | 800 ps RMS | external trigger input |
| Insertion delay | < 110 ns | < 160 ns | external trigger to output |
| Internal rate | 0.001 Hz to 20 MHz | 0.0002 Hz to 20 MHz | internal generator |
| Max trigger rate | 5 MHz | 5 MHz | and 1/(200 ns + longest active pulse) |
| Timebase | 100 MHz PLL, 50 ppm osc | 200 MHz PLL, 25 ppm osc | |
| TTL output | 4.0 V into 1 kΩ; 2.0 V into 50 Ω | 4.0 V into 1 kΩ | 50 Ω output impedance; rise < 3 ns (577), 3 ns typical (588B) |
| Adjustable output | 2 to 20 V into 1 kΩ; 0.8 to 8 V into 50 Ω | 2 to 20 V into 1 kΩ; 1 to 10 V into 50 Ω | 10 mV steps |
| High-voltage option | AT45: 4 to 45 V, 20 mV steps, 4 channels max | none published | not short-circuit protected |
| External clock in | 10 to 100 MHz, discrete | 10 to 80 MHz, discrete | clock out to 100 MHz on both |
| Trigger threshold | 0.2 to 15 V, 10 mV steps | 0.2 to 15 V | rising or falling |
| Burst counters | 10,000,000 per channel | 10,000,000 per channel; 4 × 109 system | duty cycle the same |
| Interfaces | USB, RS-232; Ethernet, GPIB optional | USB, RS-232, Ethernet | SCPI-style command set |
| Storage | 16 configurations | 12 or 24 configurations | config 0 is the factory default |
| Quantity | Model 745T | Model 765 | Model 765-HV | Condition |
|---|---|---|---|---|
| Channels | 4, plus 4 auxiliary | 2 or 4 | 1 or 2 | per ordering configuration |
| Placement resolution | 1 ps (A to D), 1.25 ns (E to H) | 10 ps | 10 ps | delay; width and period likewise on the 765 family |
| Delay range | 0 to over 20 s | 0 to period | 0 to period | 765 period 5 ns to 8 s |
| Delay accuracy | < 250 ps + 10−7 × delay | ±(0.1 percent + 100 ps) | ±(0.1 percent + 100 ps) | |
| Channel-to-channel jitter | about 5 ps RMS | < 10 ps RMS | < 15 ps RMS | 745T below 100 ns delay; 765 family all channels at one frequency |
| Period jitter | not published separately | 4 ps RMS | 15 ps RMS | 765 at 200 MHz, 100 Hz to 10 MHz integration |
| Trigger-referenced jitter | 25 ps + 10−7 × delay | < 30 ps RMS trigger in to trigger out | < 30 ps RMS trigger in to trigger out | 765 family: trigger input at or below 15 MHz; trigger to pulse output not published |
| Insertion delay | < 65 ns | < 100 ns to trigger out | < 100 ns to trigger out | |
| Edge, 20 to 80 percent | not published | < 70 ps | < 400 ps | 765 family into 50 Ω; HV up to 50 Vpp at zero offset |
| Edge, 10 to 90 percent | < 2 ns max, 900 ps typical, thresholds not published | < 105 ps at 5 Vpp | < 630 ps rise, < 840 ps fall at 50 Vpp | HV: < 570 and < 640 ps up to 25 Vpp |
| Minimum width | 100 ns; 5 ns with the narrow option | 300 ps | 1 ns | offset at zero |
| Maximum rate | 1 MHz | 200 MHz single; 800 MHz quadruple | 200 MHz single; 400 MHz multi-pulse and external width | |
| Output | 2 to 5 V positive into 50 Ω | 10 mVpp to 5 Vpp, ±5 V window | 100 mVpp to 50 Vpp, ±25 V window | into 50 Ω; no other load published for the HV |
| Amplitude resolution | 0.1 V | 1 mV below 250 mVpp, 4 mV above | 10 mV | |
| Timebase | 0.5 ppm standard, 0.05 ppm option | ±2 ppm | ±2 ppm | 765 family: ±1 ppm per year aging |
| External clock in | 10 MHz; faster as an option | 10 to 100 MHz | 10 to 100 MHz | 765 family: 50 Ω AC-coupled, −5 to +4 dBm |
| Interfaces | Front panel, USB to UART, Ethernet web server | Touch interface, SCPI over LAN, SDK | Touch interface, SCPI over LAN, SDK | |
| Format | 215 by 245 by 135 mm, under 1 kg, 50 W | 3U rack width, 9.7 kg, 120 W | 3U rack width, 9.7 kg, 300 W |
| Symbol | Meaning | Units |
|---|---|---|
| Tclk | counting clock period | s |
| N | whole clock periods counted in a delay | 1 |
| tRMS | RMS jitter | s |
| k | crest factor for peak-to-peak conversion | 1 |
| vn | RMS voltage noise at a threshold | V |
| dV/dt | slew rate through a threshold | V/s |
| L(f) | single-sideband phase noise, linear ratio | 1/Hz |
| Δt | PIV pulse separation | s |
| τ | coincidence half-width | s |
| Γ | reflection coefficient | 1 |
| Z0, ZL, ZS | line, load and source impedances | Ω |
| σeff | effective resolution under trigger jitter | s |
| A | pulse amplitude into the stated load | V |
| t20-80, t10-90 | rise time between the named thresholds | s |
| CL, Cinj | load capacitance; charge injection capacitance | F |
| Q | injected charge | C |
| εr | relative permittivity of a propagation medium | 1 |
| R, ΔR | range; range resolution | m |
When a timing budget will not close, a channel count will not fit, or a value has to be confirmed before an order is placed, a Berkeley Nucleonics applications engineer can work through it with you. Bring the timing map of section 29 and the channel count the experiment needs. An hour spent on both before the order is often an hour saved on wiring day.